公开(公告)号：US20190295852A1

公开(公告)日：2019-09-26

申请号：US15925928

申请日：2018-03-20

Applicant: GLOBALFOUNDRIES INC.

Inventor： Qun GAO ,  Naved SIDDIQUI ,  Ankur ARYA ,  John R. Sporre

IPC: H01L21/311 ,  H01L29/66 ,  H01L21/768 ,  H01L21/3105 ,  H01L21/033 ,  H01L21/762

Abstract: The manufacture of a FinFET device includes the formation of a composite sacrificial gate. The composite sacrificial gate includes a sacrificial gate layer such as a layer of amorphous silicon, and an etch selective layer such as a layer of silicon germanium. The etch selective layer, which underlies the sacrificial gate layer, enables the formation of a gate cut opening having a controlled critical dimension that extends through the composite sacrificial gate.