公开(公告)号：US20190326866A1

公开(公告)日：2019-10-24

申请号：US15959514

申请日：2018-04-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Konstantinos Manetakis ,  Thomas G. McKay

IPC: H03F3/45

Abstract: Methods form amplifier device structures that include first-third amplifier devices. The first amplifier device produces an intermediate signal. The second amplifier device is connected to an input of the first amplifier device and produces an amplified inverted output signal. The third amplifier device inverts the intermediate signal to produce an amplified non-inverted output signal that is complementary to the amplified inverted output signal. A resistor feedback loop is connected to the input and output of the first amplifier device. A gain ratio of the gain of the third amplifier device to the gain of the second amplifier device matches a resistance ratio of the source resistance of the input signal to the resistance of the resistor added to the source resistance. Also, DC loop circuits are connected to the first-third amplifier devices, and each of the DC loop circuits connects an amplifier device output to an amplifier device input.

公开(公告)号：US10700653B2

公开(公告)日：2020-06-30

申请号：US15959514

申请日：2018-04-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Konstantinos Manetakis ,  Thomas G. McKay

IPC: H03F3/04 ,  H03F3/45

Abstract: Methods form amplifier device structures that include first-third amplifier devices. The first amplifier device produces an intermediate signal. The second amplifier device is connected to an input of the first amplifier device and produces an amplified inverted output signal. The third amplifier device inverts the intermediate signal to produce an amplified non-inverted output signal that is complementary to the amplified inverted output signal. A resistor feedback loop is connected to the input and output of the first amplifier device. A gain ratio of the gain of the third amplifier device to the gain of the second amplifier device matches a resistance ratio of the source resistance of the input signal to the resistance of the resistor added to the source resistance. Also, DC loop circuits are connected to the first-third amplifier devices, and each of the DC loop circuits connects an amplifier device output to an amplifier device input.

公开(公告)号：US20170324385A1

公开(公告)日：2017-11-09

申请号：US15148668

申请日：2016-05-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Thomas G. McKay

IPC: H03F3/193 ,  H01L27/092 ,  H01L21/67 ,  H01L21/762 ,  H01L21/84 ,  H01L29/78 ,  H01L29/66 ,  H01L27/12 ,  G06F17/50 ,  H01L23/66 ,  H03G1/00 ,  H03F1/02 ,  H01L21/8238

CPC classification number: H03F3/193 ,  G06F17/5045 ,  H01L21/67011 ,  H01L21/7624 ,  H01L21/823828 ,  H01L21/823892 ,  H01L21/84 ,  H01L23/66 ,  H01L27/0928 ,  H01L27/1203 ,  H01L29/66484 ,  H01L29/7831 ,  H03F1/0205 ,  H03F3/2173 ,  H03F3/3028 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2200/456 ,  H03F2203/30031 ,  H03G1/0005 ,  H03G1/0029

Abstract: At least one method, apparatus and system disclosed involves providing semiconductor device having transistors comprising back gates and front gates. The semiconductor device comprises a signal processing unit for processing an input signal to provide an output signal. The signal processing unit includes a first transistor and a second transistor. The first transistor includes a first back gate electrically coupled to a first front gate. The signal processing unit also includes a second transistor operatively coupled to the first transistor. The second transistor includes a second back gate electrically coupled to a second front gate. The semiconductor device also includes a gain circuit for providing a gain upon the output signal. The semiconductor device also includes a bias circuit to provide a first bias signal to the first back gate and a second bias signal to the second back gate.

公开(公告)号：US10224916B1

公开(公告)日：2019-03-05

申请号：US15933579

申请日：2018-03-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Thomas G. McKay

IPC: H03K5/22 ,  H03K5/24 ,  H03F3/45

Abstract: Comparators include (among other components) two inputs, an output, and two pairs of transistors (each connected to a different one of the inputs). Both pairs of transistors are connected to the output. Additionally, a first signal generator is connected to the first transistor in each of the pairs of transistors, and a second signal generator is connected to the second transistor in each of the pairs of transistors. The first signal generator and the second signal generator output on/off control signals that have timing patterns that are inverted relative to one another, and this causes only the first transistor or the second transistor in each of the pairs of transistors to be active at any given time. Thus, the single active transistor in the first pair of transistors and the single active transistor in the second pair of transistors amplify the difference between the two inputs, through the output.

公开(公告)号：US09923527B2

公开(公告)日：2018-03-20

申请号：US15148668

申请日：2016-05-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Thomas G. McKay

IPC: H01L27/092 ,  H03F3/193 ,  H01L21/84 ,  H03G1/00 ,  H03F1/02 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78 ,  H01L23/66 ,  H01L27/12 ,  H01L21/67 ,  G06F17/50 ,  H01L21/8238

CPC classification number: H03F3/193 ,  G06F17/5045 ,  H01L21/67011 ,  H01L21/7624 ,  H01L21/823828 ,  H01L21/823892 ,  H01L21/84 ,  H01L23/66 ,  H01L27/0928 ,  H01L27/1203 ,  H01L29/66484 ,  H01L29/7831 ,  H03F1/0205 ,  H03F3/2173 ,  H03F3/3028 ,  H03F2200/267 ,  H03F2200/451 ,  H03F2200/456 ,  H03F2203/30031 ,  H03G1/0005 ,  H03G1/0029

Abstract: At least one method, apparatus and system disclosed involves providing semiconductor device having transistors comprising back gates and front gates. The semiconductor device comprises a signal processing unit for processing an input signal to provide an output signal. The signal processing unit includes a first transistor and a second transistor. The first transistor includes a first back gate electrically coupled to a first front gate. The signal processing unit also includes a second transistor operatively coupled to the first transistor. The second transistor includes a second back gate electrically coupled to a second front gate. The semiconductor device also includes a gain circuit for providing a gain upon the output signal. The semiconductor device also includes a bias circuit to provide a first bias signal to the first back gate and a second bias signal to the second back gate.