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公开(公告)号:US20240364269A1
公开(公告)日:2024-10-31
申请号:US18653486
申请日:2024-05-02
申请人: pSemi Corporation
发明人: Emre Ayranci , Miles Sanner
CPC分类号: H03F1/0277 , H03F1/086 , H03F1/565 , H03F3/193 , H03F3/195 , H03F3/72 , H03F2200/111 , H03F2200/18 , H03F2200/213 , H03F2200/222 , H03F2200/225 , H03F2200/243 , H03F2200/252 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/321 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/411 , H03F2200/42 , H03F2200/429 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/525 , H03F2200/61 , H03F2200/75 , H03F2203/7206 , H03F2203/7209 , H03F2203/7233
摘要: A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.
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公开(公告)号:US12132449B2
公开(公告)日:2024-10-29
申请号:US17932395
申请日:2022-09-15
发明人: Daisuke Watanabe
CPC分类号: H03F1/22 , H03F1/0205 , H03F3/193 , H03F3/245
摘要: An amplification circuit includes: a power supply terminal that is connected to a power supply; a transistor that has a source terminal, a drain terminal, and a gate terminal to which a high-frequency signal is input; a transistor that has a source terminal that is connected to the drain terminal, a drain terminal that outputs a high-frequency signal, and a gate terminal that is grounded; a capacitor that is serially disposed on a second path that connects the gate terminal and the power supply terminal to each other; and a switch that is serially disposed on a first path or the second path. The drain terminal and the gate terminal are connected to each other via the switch and the capacitor.
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公开(公告)号:US12132448B2
公开(公告)日:2024-10-29
申请号:US17372569
申请日:2021-07-12
发明人: Cher-Ming Tan , Vimal Kant Pandey
CPC分类号: H03F1/10 , G01T1/17 , H01L29/2003 , H03F3/193 , H03F2200/451
摘要: The present invention relates to a gallium nitride transimpedance amplifier, as an essential electronic circuit in the proton beam therapy. Because gallium nitride is more tolerant to the secondary radiation generated during the proton beam therapy, it has high reliability and increases the reliability of the overall system.
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公开(公告)号:US12113490B2
公开(公告)日:2024-10-08
申请号:US18517065
申请日:2023-11-22
发明人: Basim Noori , Marvin Marbell , Qianli Mu , Kwangmo Chris Lim , Michael E. Watts , Mario Bokatius , Jangheon Kim
IPC分类号: H03F3/187 , H01L23/00 , H01L23/48 , H01L23/498 , H01L29/778 , H03F1/56 , H03F3/193
CPC分类号: H03F1/565 , H01L23/481 , H01L23/49822 , H01L24/08 , H01L29/778 , H03F3/193 , H01L2224/08225 , H03F2200/222 , H03F2200/387 , H03F2200/451
摘要: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.
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公开(公告)号:US20240333225A1
公开(公告)日:2024-10-03
申请号:US18610639
申请日:2024-03-20
发明人: Shohei IMAI
CPC分类号: H03F1/0288 , H03F3/193 , H03F3/211 , H03F2200/451
摘要: A Doherty amplifier circuit includes a carrier amplifier that amplifies a high frequency signal, a peak amplifier that amplifies the high frequency signal, and a control circuit that controls the peak amplifier based on a supply current of an amplifying transistor in the carrier amplifier.
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公开(公告)号:US20240322760A1
公开(公告)日:2024-09-26
申请号:US18406724
申请日:2024-01-08
申请人: pSemi Corporation
IPC分类号: H03F1/22 , H03F1/02 , H03F1/30 , H03F1/32 , H03F1/56 , H03F3/16 , H03F3/193 , H03F3/195 , H03F3/213
CPC分类号: H03F1/22 , H03F1/0227 , H03F1/223 , H03F1/301 , H03F1/3205 , H03F1/3247 , H03F1/56 , H03F3/16 , H03F3/193 , H03F3/195 , H03F3/213 , H03F1/302 , H03F2200/18
摘要: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.
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公开(公告)号:US12101065B2
公开(公告)日:2024-09-24
申请号:US18492544
申请日:2023-10-23
申请人: pSemi Corporation
发明人: Miles Sanner , Emre Ayranci , Parvez Daruwalla
CPC分类号: H03F1/223 , H03F3/193 , H03F3/21 , H03F2200/294 , H03F2203/7236
摘要: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
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公开(公告)号:US12088268B2
公开(公告)日:2024-09-10
申请号:US17362885
申请日:2021-06-29
发明人: Yunchao Guan , Lei Lu
CPC分类号: H03G3/3036 , H03F3/193 , H03F2200/451 , H03G2201/103 , H03G2201/307 , H04B1/04 , H04B1/16 , H04B1/40
摘要: A variable-gain amplifier and a phased array system are provided. A variable-gain amplifier includes a cascode circuit comprising a first amplification transistor and a second amplification transistor array that are cascaded, the second amplification transistor array comprising a plurality of second amplification transistors connected in parallel and configured to output an adjustable current to an output matching network, the first amplification transistor is a common-source transistor, the plurality of second amplification transistors are common-gate transistors, or the cascode circuit is a common-emitter common-base circuit, the first amplification transistor is a common-emitter amplification circuit, and the second amplification transistor array is a common-base amplification circuit. The variable-gain amplifier further including a variable capacitor circuit coupled to the second amplification transistor array and coupled to the output matching network at first nodes.
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公开(公告)号:US20240243706A1
公开(公告)日:2024-07-18
申请号:US18620994
申请日:2024-03-28
申请人: pSemi Corporation
发明人: Emre Ayranci , Miles Sanner
IPC分类号: H03F3/195 , H03F1/02 , H03F1/22 , H03F1/56 , H03F3/193 , H03F3/72 , H03H7/38 , H03H11/28 , H04B1/00 , H04B1/16
CPC分类号: H03F3/195 , H03F1/0205 , H03F1/0261 , H03F1/223 , H03F1/565 , H03F3/193 , H03F3/72 , H03H7/38 , H03H11/28 , H04B1/006 , H04B1/16 , H03F2200/111 , H03F2200/294 , H03F2200/387 , H03F2200/451 , H03F2203/7209 , H03F2203/7236
摘要: A front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the front end circuit allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.
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公开(公告)号:US20240214742A1
公开(公告)日:2024-06-27
申请号:US18392767
申请日:2023-12-21
申请人: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. , Technische Hochschule Nürnberg Georg-Simon-Ohm
发明人: Gerd KILIAN , Johannes WORM , Stefan ERETH , Thomas LAUTERBACH , Tobias DRÄGER
CPC分类号: H04R9/06 , H04L25/4902 , H04M1/6016 , H03F3/193
摘要: Embodiments provide a transmission/reception arrangement for transmission/reception of magnetic signals, wherein the transmission/reception arrangement comprises a microcontroller and an electromagnetic resonant circuit, wherein the microcontroller is configured, in a transmission mode,
to operate the electromagnetic resonant circuit in series resonance, and
to generate a first signal for driving the electromagnetic resonant circuit, and to drive the electromagnetic resonant circuit with the generated first signal so as to generate, with the electromagnetic resonant circuit, a first magnetic signal carrying first data,
wherein the microcontroller is configured, in a reception mode,
to operate the electromagnetic resonant circuit in parallel resonance, and
to evaluate a second signal provided by the electromagnetic resonant circuit, said second signal depending on a second magnetic signal detected by the electromagnetic resonant circuit, so as to receive second data.
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