公开(公告)号：US20180302038A1

公开(公告)日：2018-10-18

申请号：US15488615

申请日：2017-04-17

Applicant: GLOBALFOUNDRIES INC.

Inventor： Arul Balasubramaniyan ,  Thomas Gregory Mckay

IPC: H03F1/02 ,  H03F3/21 ,  H03F3/45 ,  H01L29/786

CPC classification number: H01L29/78603 ,  H01L29/78648 ,  H03F1/0277 ,  H03F1/223 ,  H03F3/195 ,  H03F3/245 ,  H03F3/45179 ,  H03F3/72 ,  H03F2200/451 ,  H03F2200/511 ,  H03F2203/45112 ,  H03F2203/45228 ,  H03F2203/45342 ,  H03F2203/45394 ,  H03F2203/45731

Abstract: Embodiments of the present disclosure provide a circuit structure and method for power amplifier control with forward and reverse voltage biases to transistor back-gate regions. A circuit structure according to the disclosure can include: a power amplifier (PA) circuit having first and second transistors, the first and second transistors each including a back-gate region, wherein the back-gate region of each of the first and second transistors is positioned within a doped substrate separated from a semiconductor region by a buried insulator layer; and an analog voltage source coupled to the back-gate regions of the first and second transistors of the PA circuit, such that the analog voltage source alternatively supplies a forward bias voltage or a reverse bias voltage to the back-gate regions of the first and second transistors of the PA circuit to produce a continuously sloped power ramping profile.

公开(公告)号：US10374092B2

公开(公告)日：2019-08-06

申请号：US15488615

申请日：2017-04-17

Applicant: GLOBALFOUNDRIES INC.

Inventor： Arul Balasubramaniyan ,  Thomas Gregory Mckay

IPC: H01L29/78 ,  H01L29/786 ,  H03F3/45 ,  H03F1/02 ,  H03F1/22 ,  H03F3/195 ,  H03F3/24 ,  H03F3/72

Abstract: Embodiments of the present disclosure provide a circuit structure and method for power amplifier control with forward and reverse voltage biases to transistor back-gate regions. A circuit structure according to the disclosure can include: a power amplifier (PA) circuit having first and second transistors, the first and second transistors each including a back-gate region, wherein the back-gate region of each of the first and second transistors is positioned within a doped substrate separated from a semiconductor region by a buried insulator layer; and an analog voltage source coupled to the back-gate regions of the first and second transistors of the PA circuit, such that the analog voltage source alternatively supplies a forward bias voltage or a reverse bias voltage to the back-gate regions of the first and second transistors of the PA circuit to produce a continuously sloped power ramping profile.