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公开(公告)号：US10608582B2
公开(公告)日：2020-03-31
申请号：US15966661
申请日：2018-04-30
Applicant: GLOBALFOUNDRIES INC.
Inventor： Abdellatif Bellaouar , Arul Balasubramaniyan
IPC: H04B1/02 , H01P5/16 , H03H11/36 , H03B5/12 , G06F1/10 , H04B1/38 , H04B1/525 , H01P5/12 , H03B1/02
Abstract: A CMOS gain element is disclosed herein. Also disclosed herein are splitters, comprising the CMOS gain element, and local oscillator distribution circuitry comprising the splitters and the CMOS gain elements. Semiconductor devices comprising the local oscillator distribution circuitry may have smaller footprints and reduced power consumption relative to prior art devices.
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公开(公告)号：US20180302038A1
公开(公告)日：2018-10-18
申请号：US15488615
申请日：2017-04-17
Applicant: GLOBALFOUNDRIES INC.
Inventor： Arul Balasubramaniyan , Thomas Gregory Mckay
IPC: H03F1/02 , H03F3/21 , H03F3/45 , H01L29/786
CPC classification number: H01L29/78603 , H01L29/78648 , H03F1/0277 , H03F1/223 , H03F3/195 , H03F3/245 , H03F3/45179 , H03F3/72 , H03F2200/451 , H03F2200/511 , H03F2203/45112 , H03F2203/45228 , H03F2203/45342 , H03F2203/45394 , H03F2203/45731
Abstract: Embodiments of the present disclosure provide a circuit structure and method for power amplifier control with forward and reverse voltage biases to transistor back-gate regions. A circuit structure according to the disclosure can include: a power amplifier (PA) circuit having first and second transistors, the first and second transistors each including a back-gate region, wherein the back-gate region of each of the first and second transistors is positioned within a doped substrate separated from a semiconductor region by a buried insulator layer; and an analog voltage source coupled to the back-gate regions of the first and second transistors of the PA circuit, such that the analog voltage source alternatively supplies a forward bias voltage or a reverse bias voltage to the back-gate regions of the first and second transistors of the PA circuit to produce a continuously sloped power ramping profile.
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公开(公告)号：US10924058B2
公开(公告)日：2021-02-16
申请号：US16801667
申请日：2020-02-26
Applicant: GLOBALFOUNDRIES INC.
Inventor： Abdellatif Bellaouar , Arul Balasubramaniyan
Abstract: A CMOS gain element is disclosed herein. Also disclosed herein are splitters, comprising the CMOS gain element, and local oscillator distribution circuitry comprising the splitters and the CMOS gain elements. Semiconductor devices comprising the local oscillator distribution circuitry may have smaller footprints and reduced power consumption relative to prior art devices.
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公开(公告)号：US10749473B2
公开(公告)日：2020-08-18
申请号：US15966747
申请日：2018-04-30
Applicant: GLOBALFOUNDRIES INC.
Inventor： Abdellatif Bellaouar , Arul Balasubramaniyan
Abstract: An apparatus for performing a frequency multiplication of an mm-wave wave signal is provided. The apparatus includes a first differential circuit that is capable of receiving a 0° phase component of an input signal and a 180° phase component of the input signal having a first frequency. The first differential circuit provides a first output signal that is twice the frequency and is in −phase(0°) based on the 0° the 180° phase components of the input signal. The apparatus also includes a second differential circuit that is capable of receiving a 90° phase component of the input signal and a 270° phase component of the input signal, and provide a first output signal that is twice the frequency and out of phase(180°). The apparatus also includes a differential transformer that is configured to receive the first output signal and the second output signal. The differential transformer is configured to provide a differential output signal that has a second frequency that is twice the first frequency.
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5.发明授权公开(公告)号：US10348243B2
公开(公告)日：2019-07-09
申请号：US15213529
申请日：2016-07-19
Applicant: GLOBALFOUNDRIES INC.
Inventor： Chi Zhang , Arul Balasubramaniyan
Abstract: Embodiments of the present disclosure provide a circuit structure including: a switching transistor including a gate terminal, a back-gate terminal, a source terminal, and a drain terminal; a biasing node coupled to the back-gate terminal of the switching transistor, the biasing node being alternately selectable between an on state and an off state; a first capacitor source-coupled to the switching transistor; a second capacitor drain-coupled to the switching capacitor; and a first enabling node source-coupled to the switching transistor, the first enabling node being alternately selectable between an on state and an off state.
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Patent Agency Ranking
公开(公告)号：US10079597B1
公开(公告)日：2018-09-18
申请号：US15459867
申请日：2017-03-15
Applicant: GLOBALFOUNDRIES Inc.
Inventor： Abdellatif Bellaouar , Arul Balasubramaniyan
IPC: H03K17/16 , H01L27/092 , H01L29/78 , H01L29/06 , H03K3/012
Abstract: A method of circuit tuning, including: applying a first positive voltage and a second positive voltage to a circuit structure, the circuit structure including a p-type metal-oxide semiconductor (PMOS) device with a flipped well transistor and an n-type metal-oxide semiconductor (NMOS) device; adjusting a first threshold voltage in response to the first positive voltage being applied to a p-well region of the NMOS device and adjusting a second threshold voltage in response to the second positive voltage being applied to the p-well region of the PMOS device; and compensating the first threshold voltage and the second threshold voltage through a backgate of the PMOS device and the NMOS device relative to a same common mode voltage.
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公开(公告)号：US09806701B1
公开(公告)日：2017-10-31
申请号：US15373791
申请日：2016-12-09
Applicant: GLOBALFOUNDRIES Inc.
Inventor： Abdellatif Bellaouar , Arul Balasubramaniyan
CPC classification number: H03K5/00006 , G06F7/68 , H01L27/1203 , H01L29/1079 , H03K5/1534 , H03K2005/00026 , H03L7/0812
Abstract: A transformer-less DFM device comprising: an input receiving signals that are an integer multiple of an input signal; an edge detector that provides a quantized or a state output comparing an the input signal to a feedback signal; a statemachine that has counters and decimation circuits to provide a digitized output to a DAC that tunes delays between the input/output signals; a DLL for generating delay signals from the input signal that form an input to an edge combiner wherein the edge combiner takes different phases from the DLL to generate a multiplied output signal; a first DAC that takes the signal from the statemachine and provide a control to a supply circuit of the DLL to adjust a delay through a supply voltage; a second DAC that takes a signal from the statemachine and provides control to a backgate circuit of the DLL to adjust the delay.
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公开(公告)号：US20200028499A1
公开(公告)日：2020-01-23
申请号：US15966747
申请日：2018-04-30
Applicant: GLOBALFOUNDRIES INC.
Inventor： Abdellatif Bellaouar , Arul Balasubramaniyan
Abstract: An apparatus for performing a frequency multiplication of an mm-wave wave signal is provided. The apparatus includes a first differential circuit that is capable of receiving a 0° phase component of an input signal and a 180° phase component of the input signal having a first frequency. The first differential circuit provides a first output signal that is twice the frequency and is in −phase(0°) based on the 0° the 180° phase components of the input signal. The apparatus also includes a second differential circuit that is capable of receiving a 90° phase component of the input signal and a 270° phase component of the input signal, and provide a first output signal that is twice the frequency and out of phase(180°). The apparatus also includes a differential transformer that is configured to receive the first output signal and the second output signal. The differential transformer is configured to provide a differential output signal that has a second frequency that is twice the first frequency.
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公开(公告)号：US10374092B2
公开(公告)日：2019-08-06
申请号：US15488615
申请日：2017-04-17
Applicant: GLOBALFOUNDRIES INC.
Inventor： Arul Balasubramaniyan , Thomas Gregory Mckay
Abstract: Embodiments of the present disclosure provide a circuit structure and method for power amplifier control with forward and reverse voltage biases to transistor back-gate regions. A circuit structure according to the disclosure can include: a power amplifier (PA) circuit having first and second transistors, the first and second transistors each including a back-gate region, wherein the back-gate region of each of the first and second transistors is positioned within a doped substrate separated from a semiconductor region by a buried insulator layer; and an analog voltage source coupled to the back-gate regions of the first and second transistors of the PA circuit, such that the analog voltage source alternatively supplies a forward bias voltage or a reverse bias voltage to the back-gate regions of the first and second transistors of the PA circuit to produce a continuously sloped power ramping profile.
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公开(公告)号：US20190190446A1
公开(公告)日：2019-06-20
申请号：US15966661
申请日：2018-04-30
Applicant: GLOBALFOUNDRIES INC.
Inventor： Abdellatif Bellaouar , Arul Balasubramaniyan
CPC classification number: H03B1/02 , H01P5/16 , H03B5/1203 , H03H11/36
Abstract: A CMOS gain element is disclosed herein. Also disclosed herein are splitters, comprising the CMOS gain element, and local oscillator distribution circuitry comprising the splitters and the CMOS gain elements. Semiconductor devices comprising the local oscillator distribution circuitry may have smaller footprints and reduced power consumption relative to prior art devices.
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