公开(公告)号：US20160225895A1

公开(公告)日：2016-08-04

申请号：US14609105

申请日：2015-01-29

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xiaoli HE ,  Yanxiang LIU ,  Jerome CIAVATTI ,  Myung Hee NAM

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/311 ,  H01L29/417 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/7816 ,  H01L21/0332 ,  H01L21/32 ,  H01L29/0653 ,  H01L29/0882 ,  H01L29/1037 ,  H01L29/41775 ,  H01L29/66356 ,  H01L29/66545 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7391 ,  H01L29/7835

Abstract: A non-planar semiconductor structure includes a semiconductor substrate, multiple raised semiconductor structures coupled to the substrate, a drain well in each of the raised structures, and a drain in each drain well. The structure further includes an isolation region in each drain well adjacent the drain, each isolation region reaching to a top surface of the corresponding raised structure, and a conductive center gate on each raised structure, the conductive center gate covering a top surface, a front surface and a back surface thereof, and covering a portion of the isolation region opposite the drain. The isolation regions in the drain wells reaching to the raised structure top surface is a result of preserving the isolation region by covering it during fabrication with an HDP oxide to prevent partial removal.

Abstract translation: 非平面半导体结构包括半导体衬底，耦合到衬底的多个凸起半导体结构，每个凸起结构中的漏极阱和每个漏极阱中的漏极。 该结构还包括在漏极附近的每个漏极阱中的隔离区域，每个隔离区域到达对应的凸起结构的顶表面，以及每个凸起结构上的导电中心栅极，该导电中心栅极覆盖顶部表面，前部 表面和其后表面，并且覆盖与漏极相对的隔离区域的一部分。 到达凸起结构顶表面的漏极阱中的隔离区域是通过在用HDP氧化物制造期间通过覆盖隔离区域来保护隔离区域的结果，以防止部分去除。