公开(公告)号：US20160141206A1

公开(公告)日：2016-05-19

申请号：US14543992

申请日：2014-11-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Guillaume Bouche ,  Andy C. Wei ,  Sudharshanan Raghunthathan

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L21/76897 ,  H01L21/76802 ,  H01L21/76819 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method includes forming a first dielectric layer having at least one conductive feature embedded therein. A first plurality of conductive lines embedded in a second dielectric layer disposed above the first dielectric layer is formed. A first conductive line in the plurality of conductive lines contacts the conductive feature. The first conductive line is etched using a first etch mask to define a conductive via portion and a recessed line portion in the first conductive line. A second plurality of conductive lines embedded in a third dielectric layer disposed above the second dielectric layer is formed. A second conductive line in the second plurality of conductive lines contacts the conductive via portion and the third dielectric layer directly contacts the second dielectric layer.

Abstract translation: 一种方法包括形成具有嵌入其中的至少一个导电特征的第一电介质层。 形成嵌入在设置在第一电介质层上方的第二电介质层中的第一多个导电线。 多个导线中的第一导线接触导电特征。 使用第一蚀刻掩模蚀刻第一导电线以在第一导电线中限定导电通路部分和凹陷线部分。 形成嵌入在第二电介质层上方的第三电介质层中的第二多个导电线。 第二多个导电线中的第二导线接触导电通路部分，第三电介质层直接接触第二电介质层。

公开(公告)号：US20170004999A1

公开(公告)日：2017-01-05

申请号：US15269138

申请日：2016-09-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Guillaume Bouche ,  Andy C. Wei ,  Sudharshanan Raghunthathan

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L21/76897 ,  H01L21/76802 ,  H01L21/76819 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A device includes a first dielectric layer having at least one conductive feature embedded therein. A first plurality of conductive lines are embedded in a second dielectric layer disposed above the first dielectric layer. A first conductive line in the first plurality of conductive lines contacts the conductive feature and includes a conductive via portion and a recessed line portion. A second plurality of conductive lines are embedded in a third dielectric layer disposed above the second dielectric layer. A second conductive line in the second plurality of conductive lines contacts the conductive via portion and the conductive via portion has a first cross-sectional dimension corresponding to a width of the first conductive line and a second cross-sectional dimension corresponding to a width of the second conductive line.

Abstract translation: 一种器件包括具有嵌入其中的至少一个导电特征的第一介电层。 第一多个导电线被嵌入设置在第一电介质层上方的第二电介质层中。 第一多个导电线中的第一导电线接触导电特征并且包括导电通路部分和凹陷线部分。 第二多个导电线被嵌入设置在第二电介质层上方的第三电介质层中。 第二多个导电线中的第二导线与导电通路部分接触，并且导电通路部分具有对应于第一导线的宽度的第一横截面尺寸和对应于第一导电线宽度的第二横截面尺寸 第二导线。

公开(公告)号：US09502293B2

公开(公告)日：2016-11-22

申请号：US14543992

申请日：2014-11-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Guillaume Bouche ,  Andy C. Wei ,  Sudharshanan Raghunthathan

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L21/76897 ,  H01L21/76802 ,  H01L21/76819 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method includes forming a first dielectric layer having at least one conductive feature embedded therein. A first plurality of conductive lines embedded in a second dielectric layer disposed above the first dielectric layer is formed. A first conductive line in the plurality of conductive lines contacts the conductive feature. The first conductive line is etched using a first etch mask to define a conductive via portion and a recessed line portion in the first conductive line. A second plurality of conductive lines embedded in a third dielectric layer disposed above the second dielectric layer is formed. A second conductive line in the second plurality of conductive lines contacts the conductive via portion and the third dielectric layer directly contacts the second dielectric layer.

Abstract translation: 一种方法包括形成具有嵌入其中的至少一个导电特征的第一电介质层。 形成嵌入在设置在第一电介质层上方的第二电介质层中的第一多个导电线。 多个导线中的第一导线接触导电特征。 使用第一蚀刻掩模蚀刻第一导电线以在第一导电线中限定导电通路部分和凹陷线部分。 形成嵌入在第二电介质层上方的第三电介质层中的第二多个导电线。 第二多个导电线中的第二导线接触导电通路部分，第三电介质层直接接触第二电介质层。