公开(公告)号：US11037821B2

公开(公告)日：2021-06-15

申请号：US16400481

申请日：2019-05-01

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Xiaoming Yang ,  Haiting Wang ,  Hong Yu ,  Jeffrey Chee ,  Guoliang Zhu

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L21/033 ,  H01L21/32 ,  H01L21/311

Abstract: Methods of forming interconnects and structures for interconnects. A hardmask layer is patterned to form a plurality of first trenches arranged with a first pattern, and sidewall spacers are formed inside the first trenches on respective sidewalls of the hardmask layer bordering the first trenches. An etch mask is formed over the hardmask layer. The etch mask includes an opening exposing a portion of the hardmask layer between a pair of the sidewall spacers. The portion of the hardmask layer exposed by the opening in the etch mask is removed to define a second trench in the hardmask layer.

公开(公告)号：US11018221B2

公开(公告)日：2021-05-25

申请号：US16538785

申请日：2019-08-12

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Chun Yu Wong ,  Haiting Wang ,  Yong Jun Shi ,  Xiaoming Yang ,  Liu Jiang

IPC: H01L29/06 ,  H01L23/66 ,  H01L21/768 ,  H01L21/764

Abstract: A semiconductor device is provided, which includes an active region, a first structure, a second gate structure, a first gate dielectric sidewall, a second gate dielectric sidewall, a first air gap region, a second air gap region and a contact structure. The active region is formed over a substrate. The first and second gate structures are formed over the active region and between the first gate structure and the second gate structure are the first gate dielectric sidewall, the first air gap region, the contact structure, the second air gap region and a second gate dielectric sidewall.