公开(公告)号：US12170315B2

公开(公告)日：2024-12-17

申请号：US17569897

申请日：2022-01-06

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ali Razavieh ,  Haiting Wang

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a device with a vertical nanowire channel region and methods of manufacture. The structure includes: a bottom source/drain region; a top source/drain region; a gate structure extending between the bottom source/drain region and the top source/drain region; and a vertical nanowire in a channel region of the gate structure.

公开(公告)号：US11967637B2

公开(公告)日：2024-04-23

申请号：US17687741

申请日：2022-03-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Ali Razavieh ,  Jagar Singh ,  Haiting Wang

IPC: H01L29/735 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/73 ,  H01L29/737 ,  H01L29/78

CPC classification number: H01L29/735 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/6625 ,  H01L29/7302 ,  H01L27/0623 ,  H01L29/0817 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/737 ,  H01L29/785

Abstract: A disclosed structure includes a fin-based bipolar junction transistor (BJT) with reduced base resistance. The BJT includes one or more semiconductor fins. Each semiconductor fin has opposing sidewalls, a first width, and a base recess, which extends across the first width through the opposing sidewalls. The BJT includes a base region positioned laterally between collector and emitter regions. The base region includes a base semiconductor layer (e.g., an intrinsic base layer), which fills the base recess and which has a second width greater than the first width such that the base semiconductor layer extends laterally beyond the opposing sidewalls. In a BJT with multiple semiconductor fins, the base recess on each semiconductor fin is filled with a discrete base semiconductor layer. The base region further includes an additional base semiconductor layer (e.g., an extrinsic base layer) covering the base semiconductor layer(s). Also disclosed is a method of forming the structure.

公开(公告)号：US11888050B2

公开(公告)日：2024-01-30

申请号：US17457325

申请日：2021-12-02

Applicant: GlobalFoundries U.S. Inc.

Inventor： John L. Lemon ,  Alexander M. Derrickson ,  Haiting Wang ,  Judson R. Holt

IPC: H01L29/73 ,  H01L29/735 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/735 ,  H01L29/1008 ,  H01L29/6625

Abstract: Embodiments of the disclosure provide a lateral bipolar transistor structure with inner and outer spacers, and related methods. A lateral bipolar transistor structure may have an emitter/collector (E/C) layer over an insulator. The E/C layer has a first doping type. A first base layer is on the insulator and adjacent the E/C layer. The first base layer has a second doping type opposite the first doping type. A second base layer is on the first base layer and having the second doping type. A dopant concentration of the second base layer is greater than a dopant concentration of the first base layer. An inner spacer is on the E/C layer and adjacent the second base layer. An outer spacer is on the E/C layer and adjacent the inner spacer.

公开(公告)号：US11843034B2

公开(公告)日：2023-12-12

申请号：US17529002

申请日：2021-11-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Haiting Wang ,  Jagar Singh

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/735 ,  H01L29/423

CPC classification number: H01L29/1008 ,  H01L29/42304 ,  H01L29/6625 ,  H01L29/735

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes a lateral bipolar junction transistor including an extrinsic base region and a bilayer dielectric spacer on sidewalls of the extrinsic base region, and a p-n junction positioned under the bilayer dielectric spacer between the extrinsic base region and at least an emitter region.

公开(公告)号：US11721722B2

公开(公告)日：2023-08-08

申请号：US17524438

申请日：2021-11-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Man Gu ,  Jagar Singh ,  Haiting Wang ,  Jeffrey Johnson

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/735 ,  H01L29/737 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/1008 ,  H01L29/0649 ,  H01L29/0808 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/66242 ,  H01L29/735 ,  H01L29/737 ,  H01L29/7842

Abstract: Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes a collector having a raised portion, an emitter having a raised portion, and a base laterally arranged between the raised portion of the emitter and the raised portion of the collector. The base includes an intrinsic base layer and an extrinsic base layer stacked with the intrinsic base layer. The structure further includes a stress liner positioned to overlap with the raised portion of the collector, the raised portion of the emitter, and the extrinsic base layer.

公开(公告)号：US11222844B2

公开(公告)日：2022-01-11

申请号：US16899543

申请日：2020-06-11

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Jun Lian ,  Sipeng Gu ,  Haiting Wang ,  Yanping Shen

IPC: H01L23/522 ,  H01L43/12 ,  H01L43/02 ,  H01L45/00 ,  H01L23/528 ,  H01L23/532 ,  H01L27/11585

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. The present disclosure provides a semiconductor device including a first device region and a second device region. The first device region includes a first metal layer, a first via structure over the first metal layer, a second via structure over the first via structure, and a second metal layer over the second via structure. The first via structure and the second via structure electrically couple the second metal layer to the first metal layer. The second device region includes a third metal layer, a contact structure over the third metal layer, a memory cell structure over the contact structure, and a fourth metal layer over the memory cell structure. The first via structure and the contact structure are made of the same material.

公开(公告)号：US11177385B2

公开(公告)日：2021-11-16

申请号：US16781236

申请日：2020-02-04

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Sipeng Gu ,  Jiehui Shu ,  Baofu Zhu

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure extends over a channel region in a semiconductor body. The gate structure has a first side surface and a second side surface opposite the first side surface. A first source/drain region is positioned adjacent to the first side surface of the gate structure and a second source/drain region is positioned adjacent to the second side surface of the gate structure. The first source/drain region includes a first epitaxial semiconductor layer, and the second source/drain region includes a second epitaxial semiconductor layer. A first top surface of the first epitaxial semiconductor layer is positioned at a first distance from the channel region, a second top surface of the second epitaxial semiconductor layer is positioned at a second distance from the channel region, and the first distance is greater than the second distance.

公开(公告)号：US20210217887A1

公开(公告)日：2021-07-15

申请号：US16739299

申请日：2020-01-10

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Jiehui Shu ,  Haiting Wang ,  Hong Yu

IPC: H01L29/78 ,  H01L27/088 ,  H01L21/762 ,  H01L29/66

Abstract: A transistor device that includes a single semiconductor structure having an outer perimeter and a vertical height, wherein the single semiconductor structure is at least partially defined by a trench formed in a semiconductor substrate and a first layer of material positioned on the bottom surface of the trench and around the outer perimeter of the single semiconductor structure. The device also includes a second layer of material positioned on the first layer of material and around the outer perimeter of the single semiconductor structure, a gap between the outer perimeter of the single semiconductor structure and both the first and second layers of material (when considered collectively) and an insulating sidewall spacer positioned in the gap, wherein the insulating sidewall spacer has a vertical height that is less than the vertical height of the single semiconductor structure.

公开(公告)号：US11018221B2

公开(公告)日：2021-05-25

申请号：US16538785

申请日：2019-08-12

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Chun Yu Wong ,  Haiting Wang ,  Yong Jun Shi ,  Xiaoming Yang ,  Liu Jiang

IPC: H01L29/06 ,  H01L23/66 ,  H01L21/768 ,  H01L21/764

Abstract: A semiconductor device is provided, which includes an active region, a first structure, a second gate structure, a first gate dielectric sidewall, a second gate dielectric sidewall, a first air gap region, a second air gap region and a contact structure. The active region is formed over a substrate. The first and second gate structures are formed over the active region and between the first gate structure and the second gate structure are the first gate dielectric sidewall, the first air gap region, the contact structure, the second air gap region and a second gate dielectric sidewall.

公开(公告)号：US20240021713A1

公开(公告)日：2024-01-18

申请号：US18373598

申请日：2023-09-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08 ,  H01L29/417

CPC classification number: H01L29/735 ,  H01L29/6625 ,  H01L29/737 ,  H01L29/0808 ,  H01L29/41708 ,  H01L29/0821

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.