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公开(公告)号:US11037821B2
公开(公告)日:2021-06-15
申请号:US16400481
申请日:2019-05-01
发明人: Xiaoming Yang , Haiting Wang , Hong Yu , Jeffrey Chee , Guoliang Zhu
IPC分类号: H01L21/768 , H01L23/528 , H01L23/522 , H01L21/033 , H01L21/32 , H01L21/311
摘要: Methods of forming interconnects and structures for interconnects. A hardmask layer is patterned to form a plurality of first trenches arranged with a first pattern, and sidewall spacers are formed inside the first trenches on respective sidewalls of the hardmask layer bordering the first trenches. An etch mask is formed over the hardmask layer. The etch mask includes an opening exposing a portion of the hardmask layer between a pair of the sidewall spacers. The portion of the hardmask layer exposed by the opening in the etch mask is removed to define a second trench in the hardmask layer.
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公开(公告)号:US11164954B2
公开(公告)日:2021-11-02
申请号:US16435563
申请日:2019-06-10
发明人: Sipeng Gu , Zhiguo Sun , Guoliang Zhu , Xinyuan Dou
摘要: A semiconductor device is provided, which includes providing an active region, a source region, a drain region, a dielectric layer, a gate structure and a nitrogen-infused dielectric layer. The source region and the drain region are formed in the active region. The dielectric layer is disposed over the source region and the drain region. The gate structure formed in the dielectric layer is positioned between the source region and the drain region. The nitrogen-infused dielectric layer is disposed over the dielectric layer and over the gate structure.
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