公开(公告)号：US20170243806A1

公开(公告)日：2017-08-24

申请号：US15048140

申请日：2016-02-19

Applicant: Google Inc.

Inventor： Madhu Krishnan Iyengar ,  Teck-Gyu Kang ,  Christopher Gregory Malone ,  Norman Paul Jouppi

IPC: H01L23/473 ,  H01L25/18 ,  H01L23/373 ,  H01L23/498 ,  H01L23/04 ,  H01L23/367

CPC classification number: H01L23/473 ,  H01L23/04 ,  H01L23/3675 ,  H01L23/3732 ,  H01L23/3736 ,  H01L23/3737 ,  H01L23/44 ,  H01L23/498 ,  H01L25/0652 ,  H01L25/18

Abstract: A semiconductor package includes a substrate, an integrated circuit disposed on the substrate, a memory support disposed on the integrated circuit, stacked memory disposed on the memory support and in communication with the integrated circuit, and a lid connected to the substrate. The integrated circuit has a low power region and a high power region. The memory support is disposed on the low power region of the integrated circuit and is configured to allow a flow of fluid therethrough to conduct heat away from the low power region of the integrated circuit. The lid defines a first port, a second port, and a lid volume fluidly connecting the first port and the second port. The lid volume is configured to house the integrated circuit, the memory support, and the stacked memory, while directing the flow of fluid to flow over the integrated circuit, the memory support, and the stacked memory.

公开(公告)号：US10032695B2

公开(公告)日：2018-07-24

申请号：US15048140

申请日：2016-02-19

Applicant: Google Inc.

Inventor： Madhu Krishnan Iyengar ,  Teck-Gyu Kang ,  Christopher Gregory Malone ,  Norman Paul Jouppi

IPC: H01L23/473 ,  H01L23/04 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L25/18 ,  H01L23/44 ,  H01L25/065

Abstract: A semiconductor package includes a substrate, an integrated circuit disposed on the substrate, a memory support disposed on the integrated circuit, stacked memory disposed on the memory support and in communication with the integrated circuit, and a lid connected to the substrate. The integrated circuit has a low power region and a high power region. The memory support is disposed on the low power region of the integrated circuit and is configured to allow a flow of fluid therethrough to conduct heat away from the low power region of the integrated circuit. The lid defines a first port, a second port, and a lid volume fluidly connecting the first port and the second port. The lid volume is configured to house the integrated circuit, the memory support, and the stacked memory, while directing the flow of fluid to flow over the integrated circuit, the memory support, and the stacked memory.