公开(公告)号：US09805770B1

公开(公告)日：2017-10-31

申请号：US15217739

申请日：2016-07-22

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Emmanuelle J. Merced Grafals ,  John Paul Strachan ,  Noraica Davila

IPC: G11C7/00 ,  G11C13/00 ,  G11C11/56 ,  H01L23/528

CPC classification number: G11C7/00 ,  G11C11/5614 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2013/0066 ,  G11C2013/0071 ,  G11C2013/0076 ,  G11C2013/0083 ,  G11C2213/79 ,  H01L23/528

Abstract: A set procedure of a one transistor, one memristor memory elements may comprise determining a gate voltage for the transistor based on the desired target value. Increasing set pulses may be applied to memristor while the gate is held at the determined gate voltage.