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    Crack detection circuits for printheads
    1.
    发明授权
    Crack detection circuits for printheads 有权
    打印头裂纹检测电路

    公开(公告)号：US08888226B1

    公开(公告)日：2014-11-18

    申请号：US13926171

    申请日：2013-06-25

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： James M. Gardner ,  Chris Bakker ,  Eric T. Martin

    IPC: B41J29/393 ,  B41J29/38

    CPC classification number: B41J29/38 ,  B41J2/14072 ,  B41J2/14153

    Abstract: Crack detection circuits for printheads are described. In an example, a crack detection circuit for at least one printhead, includes: crack detectors formed on the at least one printhead; switches selectively coupling the crack detectors on each printhead to a communication bus; and a configuration circuit on each printhead coupled to control inputs of the respective switches, each configuration circuit responsive to a crack detection configuration input to control the respective switches.

    Abstract translation: 描述了用于打印头的裂纹检测电路。 在一个示例中，用于至少一个打印头的裂纹检测电路包括：形成在所述至少一个打印头上的裂纹检测器; 开关选择性地将每个打印头上的裂纹检测器耦合到通信总线; 以及每个打印头上的配置电路，其耦合到控制各个开关的输入，每个配置电路响应于裂纹检测配置输入以控制相应的开关。

    Reset monitor
    2.
    发明授权
    Reset monitor 有权

    公开(公告)号：US11498328B2

    公开(公告)日：2022-11-15

    申请号：US16957518

    申请日：2019-02-06

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： Scott A. Linn ,  James M. Gardner

    IPC: B41J2/045 ,  B41J29/393

    Abstract: An integrated circuit to drive a plurality of actuators during a non-reset operating condition is disclosed. The integrated circuit includes a reset input to receive a reset signal activated for a duration. The reset signal generates a reset condition in the integrated circuit during which the non-reset operating condition is blocked. The integrated circuit also includes a monitor circuit operably coupled to the reset input to indicate if the duration of the reset signal meets or exceeds a selected duration.

    Reset monitor
    5.
    发明授权
    Reset monitor 有权

    公开(公告)号：US11807001B2

    公开(公告)日：2023-11-07

    申请号：US17950412

    申请日：2022-09-22

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： Scott A. Linn ,  James M. Gardner

    IPC: B41J29/393 ,  B41J2/045

    CPC classification number: B41J2/04586 ,  B41J2/04541 ,  B41J2/04573 ,  B41J29/393

    Abstract: An integrated circuit for a fluid ejection device having actuators to operate during a non-reset operating condition is disclosed. The integrated circuit includes a reset input to receive a reset signal activated for a duration. The reset signal generates a reset condition in the integrated circuit. The integrated circuit also includes a monitor circuit operably coupled to the reset input to indicate if the duration of the reset signal meets or exceeds a selected duration and a nonvolatile memory device having data accessible during the reset condition.

    Print head array testing
    9.
    发明授权
    Print head array testing 有权
    打印头阵列测试

    公开(公告)号：US08733885B1

    公开(公告)日：2014-05-27

    申请号：US13765742

    申请日：2013-02-13

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： James M. Gardner ,  Ronald A. Hellekson ,  Eric T. Martin ,  Peter J. Fricke

    IPC: B41J29/393

    CPC classification number: B41J29/393 ,  B41J2029/3932

    Abstract: A method and apparatus test a printed circuit assembly and a print head array with a low-power application to a printed circuit assembly having a power storage component disconnected from a power rail of the printed circuit assembly and test the printed circuit assembly and the print head array with a high-power application to the printed circuit assembly with the printed circuit assembly receiving electrical power from the power storage component.

    Abstract translation: 一种方法和装置，测试印刷电路组件和具有低功率应用于印刷电路组件的打印头阵列，该印刷电路组件具有与印刷电路组件的电源轨道断开的电力存储部件，并测试印刷电路组件和打印头 阵列，其具有高功率应用于印刷电路组件，印刷电路组件从电力存储部件接收电力。

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