Power converters
    1.
    发明授权
    Power converters 有权
    电源转换器

    公开(公告)号:US09555711B2

    公开(公告)日:2017-01-31

    申请号:US14295266

    申请日:2014-06-03

    Abstract: A power converter includes a first set of transistors electrically connected in series, a second set of transistors electrically connected in series, and an AC link. The second set of transistors is electrically connected in parallel with the first set of transistors to form an H-bridge. The AC link is electrically connected between the first and second sets of transistors. A plurality of H-bridges are connected in parallel and a three-wire DC bus is electrically connected to the H-bridges.

    Abstract translation: 电力转换器包括串联电连接的第一组晶体管,串联电连接的第二组晶体管和AC连接。 第二组晶体管与第一组晶体管并联电连接以形成H桥。 AC链路电连接在第一和第二组晶体管之间。 多个H桥并联连接,三线直流母线与H桥电连接。

    Thermal stress reduction in aircraft motor controllers

    公开(公告)号:US09435264B2

    公开(公告)日:2016-09-06

    申请号:US14282312

    申请日:2014-05-20

    CPC classification number: F02C7/26 H02M7/487 H02P9/08

    Abstract: A thermal stress reduction method includes ramping an electric power generator to start an aircraft engine, for a time period associated with the aircraft engine start sequence toggling a three-level inverter switch array to a three-level pulse width modulation mode, determining if a first time interval in the three-level pulse width modulation mode exceeded a predetermined three-level pulse width modulation mode interval, in response to the first time interval exceeding the three-level pulse width modulation mode interval, toggling the three-level inverter switch array to a two-level pulse width modulation mode, determining if a second time interval in the two-level pulse width modulation mode exceeded a predetermined two-level pulse width modulation mode interval and in response to the second time interval exceeding the two-level pulse width modulation mode interval, toggling the three-level inverter switch array to the three-level pulse width modulation mode.

    THERMAL STRESS REDUCTION IN AIRCRAFT MOTOR CONTROLLERS

    公开(公告)号:US20140253005A1

    公开(公告)日:2014-09-11

    申请号:US14282312

    申请日:2014-05-20

    CPC classification number: F02C7/26 H02M7/487 H02P9/08

    Abstract: A thermal stress reduction method includes ramping an electric power generator to start an aircraft engine, for a time period associated with the aircraft engine start sequence toggling a three-level inverter switch array to a three-level pulse width modulation mode, determining if a first time interval in the three-level pulse width modulation mode exceeded a predetermined three-level pulse width modulation mode interval, in response to the first time interval exceeding the three-level pulse width modulation mode interval, toggling the three-level inverter switch array to a two-level pulse width modulation mode, determining if a second time interval in the two-level pulse width modulation mode exceeded a predetermined two-level pulse width modulation mode interval and in response to the second time interval exceeding the two-level pulse width modulation mode interval, toggling the three-level inverter switch array to the three-level pulse width modulation mode.

    Solid-state power converters
    4.
    发明授权

    公开(公告)号:US10243482B2

    公开(公告)日:2019-03-26

    申请号:US14330668

    申请日:2014-07-14

    Inventor: Adam M. White

    Abstract: A phase leg for a multilevel inverter includes a first direct current lead, an outer solid-state switch, an inner solid-state switch, and a midpoint-clamping device. The outer solid-state switch device is connected to the first direct current lead. The inner solid-state switch is connected in series with the outer solid-state switch. The midpoint-clamping device is a bi-directional current flow device connected between a second DC lead and a node between the inner and outer solid-state switches for reducing conduction losses associated with current flowing through the phase leg.

    Solid-state inverters with voltage-balanced switches
    5.
    发明授权
    Solid-state inverters with voltage-balanced switches 有权
    具有电压平衡开关的固态逆变器

    公开(公告)号:US09564833B2

    公开(公告)日:2017-02-07

    申请号:US14295159

    申请日:2014-06-03

    Abstract: A phase leg for a multilevel inverter includes a positive DC lead, a first outer MOSFET connected to the positive DC lead, a first inner IGBT connected to the first outer MOSFET, a second inner IGBT connected to the first inner IGBT, and a second outer IGBT connected to the second inner IGBT. The first and second outer MOSFETs are superjunction MOSFETs voltage balanced by the first and second IGBTs for reducing voltage stress in the solid-state switch phase leg when the superjunction MOSFET and the IGBT are conducting current from the DC lead to the AC lead.

    Abstract translation: 用于多电平逆变器的相支路包括正直流引线,连接到正直流引线的第一外部MOSFET,连接到第一外部MOSFET的第一内部IGBT,连接到第一内部IGBT的第二内部IGBT和第二外部IGBT IGBT连接到第二个内部IGBT。 第一和第二外部MOSFET是由第一和第二IGBT电压平衡的超结MOSFET,用于在超导MOSFET和IGBT正在将电流从DC引线传导到AC引线时,用于降低固态开关相位支路中的电压应力。

    SYSTEMS AND METHODS FOR CONTROLLING INVERTERS
    6.
    发明申请
    SYSTEMS AND METHODS FOR CONTROLLING INVERTERS 有权
    用于控制逆变器的系统和方法

    公开(公告)号:US20160294303A1

    公开(公告)日:2016-10-06

    申请号:US14678334

    申请日:2015-04-03

    Inventor: Adam M. White

    CPC classification number: H02M7/537 H02M7/487 H02M2001/0025 H02M2001/123

    Abstract: A method of controlling an inverter includes receiving a target waveform for output voltage of an inverter phase, calculating a phase bias for an inverter phase using the target waveform, biasing the target waveform using the phase bias, and generating a switching device command signal by comparing the biased target waveform to a carrier waveform. The switching device command signal has a switching patter that reduces midpoint current in an inverter input lead and common mode voltage in an inverter output lead.

    Abstract translation: 控制逆变器的方法包括接收逆变器相位的输出电压的目标波形,使用目标波形计算逆变器相位的相位偏置,使用相位偏置偏置目标波形,并通过比较产生开关装置指令信号 偏置的目标波形到载波波形。 开关装置指令信号具有减少逆变器输入引线中的中点电流和逆变器输出引线中的共模电压的开关模式。

    SOLID-STATE INVERTERS WITH VOLTAGE-BALANCED SWITCHES
    7.
    发明申请
    SOLID-STATE INVERTERS WITH VOLTAGE-BALANCED SWITCHES 有权
    具有电压平衡开关的固态逆变器

    公开(公告)号:US20150349660A1

    公开(公告)日:2015-12-03

    申请号:US14295159

    申请日:2014-06-03

    Abstract: A phase leg for a multilevel inverter includes a positive DC lead, a first outer MOSFET connected to the positive DC lead, a first inner IGBT connected to the first outer MOSFET, a second inner IGBT connected to the first inner IGBT, and a second outer IGBT connected to the second inner IGBT. The first and second outer MOSFETs are superjunction MOSFETs voltage balanced by the first and second IGBTs for reducing voltage stress in the solid-state switch phase leg when the superjunction MOSFET and the IGBT are conducting current from the DC lead to the AC lead.

    Abstract translation: 用于多电平逆变器的相支路包括正直流引线,连接到正直流引线的第一外部MOSFET,连接到第一外部MOSFET的第一内部IGBT,连接到第一内部IGBT的第二内部IGBT和第二外部IGBT IGBT连接到第二个内部IGBT。 第一和第二外部MOSFET是由第一和第二IGBT电压平衡的超结MOSFET,用于在超导MOSFET和IGBT正在将电流从DC引线传导到AC引线时,用于降低固态开关相位支路中的电压应力。

    Systems and methods for controlling inverters

    公开(公告)号:US09742311B2

    公开(公告)日:2017-08-22

    申请号:US14874116

    申请日:2015-10-02

    Inventor: Adam M. White

    Abstract: A method of controlling an inverter includes receiving output voltage target waveforms for phases of an inverter, generating uncompensated midpoint duty cycle waveforms for the inverter phases, selecting an uncompensated midpoint duty cycle waveform for one of the inverter phases based on the magnitudes of the uncompensated midpoint duty cycle waveforms, and applying a compensation signal to the selected uncompensated midpoint duty cycle waveform. An inverter controller and inverter employ the method for generating switch command signals for solid-state switch devices of the inverter.

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