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公开(公告)号:US20190068515A1
公开(公告)日:2019-02-28
申请号:US15692891
申请日:2017-08-31
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Jonathan M. Seely , Mark Shillingburg
IPC: H04L12/801 , H04L12/861 , H04L12/823 , H04L12/721 , H04L12/911
CPC classification number: H04L47/39 , H04L43/16 , H04L45/72 , H04L47/30 , H04L47/32 , H04L47/70 , H04L47/783 , H04L49/9005
Abstract: Example implementations relate to packet transmission credit allocation. In some examples, a system may include a processing resource and a memory resource storing instructions executable by the processing resource to allocate a first amount of packet transmission credits from a destination node to a source node; determine a modification to the first amount of packet transmission credits allocated from the destination node to the source node based on a comparison of a quantity of redeemed packet transmission credits by the source node to a packet transmission credit threshold of the source node; adjust the modification based on a condition at a buffer associated with the destination node; and apply the adjusted modification to the first amount of packet transmission credits to produce a second amount of packet transmission credits to allocate from the destination node to the source node.
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2.
公开(公告)号:US10437757B2
公开(公告)日:2019-10-08
申请号:US15789634
申请日:2017-10-20
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Mark Shillingburg
IPC: G06F13/364 , G06F13/362 , G06F13/16 , G06F13/374
Abstract: Example implementations relate to an arbitration node. For example, an arbitration node can include instructions to receive, at the arbitration node at a level of a binary tree structure, a first request including a first request signal and a first priority signal and receive a second request including a second request signal and a second priority signal. In some examples, the arbitration node can include instructions to determine priority of requests by comparing the first request signal and the second request signal and by comparing the first priority signal and the second priority, and send a request signal and a priority signal of the request with the determined priority to a subsequent arbitration node at a subsequent level of the binary tree structure.
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公开(公告)号:US20190109792A1
公开(公告)日:2019-04-11
申请号:US15727084
申请日:2017-10-06
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Jonathan M. Seely , Eric J. Pelletier , Brian Peter L'Ecuyer , Mark Shillingburg
IPC: H04L12/813 , H04L12/803 , H04L12/911
CPC classification number: H04L47/20 , H04L47/125 , H04L47/24 , H04L47/32 , H04L47/781 , H04L47/783 , H04L49/10 , H04L49/503 , H04L49/9084
Abstract: An example of a system may include a processing resource and a controller including a memory resource storing instructions executable by the processing resource to determine a rate of traffic communication at each of a plurality of ingresses participating in a communication of a packet flow context, determine a rate of traffic communication at each of a plurality of egresses participating in the communication of the packet flow context, determine a target packet admission rate applicable to each of the plurality of ingresses from the rate of traffic communication at each of the plurality of ingresses and the rate of traffic communication at each of the plurality of egresses, and communicate the target packet admission rate to an ingress of the plurality of ingresses.
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公开(公告)号:US10536385B2
公开(公告)日:2020-01-14
申请号:US15487925
申请日:2017-04-14
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Jonathan Michael Seely , Mark Shillingburg , Eric Pelletier , Brian Peter L'Ecuyer
IPC: H04L12/825 , H04L12/935 , H04L12/835 , H04L12/26
Abstract: Examples include sampling a transmit rate of an egress port queue on a destination node, determining a utilization percentage of the egress port queue based on the transmit rate and a total rate capacity of the egress port, and determining a backlog percentage of the egress port queue. Examples also include determining an output rate for a virtual output queue on a source node based on the utilization percentage and the backlog percentage. The virtual output queue is for the egress port queue.
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公开(公告)号:US10419350B2
公开(公告)日:2019-09-17
申请号:US15727084
申请日:2017-10-06
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Jonathan M. Seely , Eric J. Pelletier , Brian Peter L'Ecuyer , Mark Shillingburg
IPC: H04L12/813 , H04L12/803 , H04L12/911 , H04L12/931 , H04L12/851 , H04L12/823 , H04L12/933 , H04L12/861
Abstract: An example of a system may include a processing resource and a controller including a memory resource storing instructions executable by the processing resource to determine a rate of traffic communication at each of a plurality of ingresses participating in a communication of a packet flow context, determine a rate of traffic communication at each of a plurality of egresses participating in the communication of the packet flow context, determine a target packet admission rate applicable to each of the plurality of ingresses from the rate of traffic communication at each of the plurality of ingresses and the rate of traffic communication at each of the plurality of egresses, and communicate the target packet admission rate to an ingress of the plurality of ingresses.
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公开(公告)号:US10785348B2
公开(公告)日:2020-09-22
申请号:US15689644
申请日:2017-08-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Mark Shillingburg , Jonathan M. Seely
Abstract: Example implementations relate to segment size determination. In an example, the system may include a processing resource and a memory resource storing machine-readable instructions to cause the processing resource to determine a quantity of segments to be generated from a packet, and alter, in response to the determined quantity of segments and a memory block size of a destination port, a segment size for each of the quantity of segments.
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公开(公告)号:US10469395B2
公开(公告)日:2019-11-05
申请号:US15692891
申请日:2017-08-31
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Jonathan M. Seely , Mark Shillingburg
IPC: H04L12/801 , H04L12/861 , H04L12/823 , H04L12/721 , H04L12/911 , H04L12/26
Abstract: Example implementations relate to packet transmission credit allocation. In some examples, a system may include a processing resource and a memory resource storing instructions executable by the processing resource to allocate a first amount of packet transmission credits from a destination node to a source node; determine a modification to the first amount of packet transmission credits allocated from the destination node to the source node based on a comparison of a quantity of redeemed packet transmission credits by the source node to a packet transmission credit threshold of the source node; adjust the modification based on a condition at a buffer associated with the destination node; and apply the adjusted modification to the first amount of packet transmission credits to produce a second amount of packet transmission credits to allocate from the destination node to the source node.
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公开(公告)号:US10452585B2
公开(公告)日:2019-10-22
申请号:US15267786
申请日:2016-09-16
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Shiro Suzuki , Jonathan Greenlaw , Mark Shillingburg
IPC: G06F13/40 , G06F17/50 , H04L12/933
Abstract: Examples herein relate to crossbar switches and related circuitry. An example crossbar switch includes a plurality of abutted tiles forming a crossbar. The plurality of abutted tiles includes a plurality of edge tiles and at least one middle tile, where each side of each middle tile abuts an edge tile or another middle tile. Each middle tile includes data inputs connected to data outputs, switched data inputs connected to switched data outputs, and pipeline delay registers coupled to data inputs and switched data outputs to allow transmission of a data signal to change directions inside each middle tile. Each edge tile includes a crossbar input, a crossbar output, and a set of inputs, outputs, and pipeline delay registers to allow transmission of data signals from any side of the edge tile to any other side of the edge tile.
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9.
公开(公告)号:US20190121766A1
公开(公告)日:2019-04-25
申请号:US15789634
申请日:2017-10-20
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Mark Shillingburg
IPC: G06F13/362 , G06F13/364 , G06F13/374
CPC classification number: G06F13/364 , G06F13/1605 , G06F13/3625
Abstract: Example implementations relate to an arbitration node. For example, an arbitration node can include instructions to receive, at the arbitration node at a level of a binary tree structure, a first request including a first request signal and a first priority signal and receive a second request including a second request signal and a second priority signal. In some examples, the arbitration node can include instructions to determine priority of requests by comparing the first request signal and the second request signal and by comparing the first priority signal and the second priority, and send a request signal and a priority signal of the request with the determined priority to a subsequent arbitration node at a subsequent level of the binary tree structure.
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公开(公告)号:US20190068761A1
公开(公告)日:2019-02-28
申请号:US15689644
申请日:2017-08-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Mark Shillingburg , Jonathan M. Seely
IPC: H04L29/06
Abstract: Example implementations relate to segment size determination. In an example, the system may include a processing resource and a memory resource storing machine-readable instructions to cause the processing resource to determine a quantity of segments to be generated from a packet, and alter, in response to the determined quantity of segments and a memory block size of a destination port, a segment size for each of the quantity of segments.
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