公开(公告)号：US10454302B2

公开(公告)日：2019-10-22

申请号：US15522771

申请日：2014-10-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Stephen Horvath ,  Eric Pelletier

IPC: G06F1/00 ,  H02J13/00 ,  H02J3/38 ,  H01M10/44 ,  H02J3/40 ,  H02J7/00

Abstract: Examples of power source adjustment can include a device that includes a sensing device to measure a first thermal temperature of a first power source and second thermal temperature of a second power source, a controller to balance power sourced by each of the first and the second power sources based on the first and the second thermal temperatures, and a circuit to adjust the power sourced by each of the first and the second power sources based on the balanced sourced power.

公开(公告)号：US20180302329A1

公开(公告)日：2018-10-18

申请号：US15487925

申请日：2017-04-14

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Jonathan Michael Seely ,  Mark Shillingburg ,  Eric Pelletier ,  Brian Peter L'Ecuyer

IPC: H04L12/825 ,  H04L12/835 ,  H04L12/935 ,  H04L12/26

CPC classification number: H04L47/26 ,  H04L43/0852 ,  H04L43/0876 ,  H04L43/0894 ,  H04L43/10 ,  H04L43/16 ,  H04L47/30 ,  H04L49/3027 ,  H04L49/3045

Abstract: Examples include sampling a transmit rate of an egress port queue on a destination node, determining a utilization percentage of the egress port queue based on the transmit rate and a total rate capacity of the egress port, and determining a backlog percentage of the egress port queue. Examples also include determining an output rate for a virtual output queue on a source node based on the utilization percentage and the backlog percentage. The virtual output queue is for the egress port queue.

公开(公告)号：US10733132B2

公开(公告)日：2020-08-04

申请号：US15995947

申请日：2018-06-01

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Eric Pelletier ,  Boon Siang Choo ,  Mohammadreza Rozehrezvani

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/10 ,  G06F30/34

Abstract: Methods, apparatus, and systems for transferring data between a first and second module are provided. In one aspect, a method includes receiving, by a virtual controller register, outbound data; arbitrating, at a virtual arbitrate, the outbound data; transmitting, from the virtual controller register to the master low speed bus (LSB) frame/de-frame, the outbound data; adding, at the master LSB frame/de-frame, identification data to the outbound data to create an outbound data frame; transmitting, from the master LSB frame/de-frame to a slave LSB frame/de-frame, the outbound data frame; parsing, at the slave LSB frame/de-frame, the outbound data frame into parsed outbound data; arbitrating the parsed outbound data; transmitting, from the slave LSB frame/de-frame to the target controller register, the parsed outbound data; and receiving, at a target controller port from the target controller register, the parsed outbound data for transmitting to the slave device.

公开(公告)号：US10536385B2

公开(公告)日：2020-01-14

申请号：US15487925

申请日：2017-04-14

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Jonathan Michael Seely ,  Mark Shillingburg ,  Eric Pelletier ,  Brian Peter L'Ecuyer

IPC: H04L12/825 ,  H04L12/935 ,  H04L12/835 ,  H04L12/26

Abstract: Examples include sampling a transmit rate of an egress port queue on a destination node, determining a utilization percentage of the egress port queue based on the transmit rate and a total rate capacity of the egress port, and determining a backlog percentage of the egress port queue. Examples also include determining an output rate for a virtual output queue on a source node based on the utilization percentage and the backlog percentage. The virtual output queue is for the egress port queue.

公开(公告)号：US20190370205A1

公开(公告)日：2019-12-05

申请号：US15995947

申请日：2018-06-01

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Eric Pelletier ,  Boon Siang Choo ,  Mohammadreza Rozehrezvani

IPC: G06F13/40 ,  G06F13/42

Abstract: Methods, apparatus, and systems for transferring data between a first and second module are provided. In one aspect, a method includes receiving, by a virtual controller register, outbound data; arbitrating, at a virtual arbitrate, the outbound data; transmitting, from the virtual controller register to the master low speed bus (LSB) frame/de-frame, the outbound data; adding, at the master LSB frame/de-frame, identification data to the outbound data to create an outbound data frame; transmitting, from the master LSB frame/de-frame to a slave LSB frame/de-frame, the outbound data frame; parsing, at the slave LSB frame/de-frame, the outbound data frame into parsed outbound data; arbitrating the parsed outbound data; transmitting, from the slave LSB frame/de-frame to the target controller register, the parsed outbound data; and receiving, at a target controller port from the target controller register, the parsed outbound data for transmitting to the slave device.