公开(公告)号：US20080044989A1

公开(公告)日：2008-02-21

申请号：US11832270

申请日：2007-08-01

申请人： Ho-Jin OH ,  Je-Min PARK ,  Jee-Eun JUNG

发明人： Ho-Jin OH ,  Je-Min PARK ,  Jee-Eun JUNG

IPC分类号： G03C5/00 ,  H01L21/3205

CPC分类号： G03F1/70 ,  G03F1/00 ,  H01L29/4238

摘要： An embodiment of a photomask for forming gate lines and a method of manufacturing semiconductor devices using the photomask is disclosed. The photomask includes a photomask substrate, gate line mask patterns that define gate lines that cross at least one active region on a semiconductor substrate, and that are arranged in parallel, gate tab mask patterns formed on both sides of each gate line mask pattern, and joints formed between adjacent gate tab mask patterns, and that include a separation region. A relatively large gate tab mask pattern can be formed using the photomask. And a short channel effect at the boundary of the active region can be improved with the large gate tab mask pattern, so the characteristics and reliability of the semiconductor devices can be improved.

摘要翻译： 公开了用于形成栅极线的光掩模的实施例和使用光掩模制造半导体器件的方法。 光掩模包括光掩模基板，限定栅极线的栅极线掩模图案，栅极线与半导体衬底上的至少一个有源区交叉并且平行布置，形成在每个栅极线掩模图案的两侧上的栅极掩模图案，以及 在相邻的闸板掩模图案之间形成的接头，并且包括分离区域。 可以使用光掩模形成相对较大的栅极贴片掩模图案。 并且通过大的栅极片掩模图案可以改善有源区边界的短沟道效应，从而可以提高半导体器件的特性和可靠性。

公开(公告)号：US20080054354A1

公开(公告)日：2008-03-06

申请号：US11849928

申请日：2007-09-04

申请人： Ho-Jin OH ,  Jee-Eun JUNG

发明人： Ho-Jin OH ,  Jee-Eun JUNG

IPC分类号： H01L29/78 ,  G03F9/00 ,  H01L21/336

CPC分类号： H01L29/66621 ,  G03F1/50 ,  H01L29/1037 ,  H01L29/4236 ,  H01L29/7834

摘要： A photo mask, a semiconductor integrated circuit, and a method of manufacturing the same are provided. The photo mask includes light transmitting rows and recess trenches, respectively, that include a short region in every other light transmitting row. In the semiconductor integrated circuit, the short region may include a dummy transistor so that short-circuiting bridges that may occur between adjacent recess trenches will not adversely affect the operations of the semiconductor integrated circuit.

摘要翻译： 提供了一种光掩模，半导体集成电路及其制造方法。 光掩模包括分别包括在每隔一个光传输行中的短区域的透光行和凹槽。 在半导体集成电路中，短区域可以包括虚设晶体管，使得可能在相邻凹槽之间发生的短路桥不会不利地影响半导体集成电路的操作。

公开(公告)号：US20080054353A1

公开(公告)日：2008-03-06

申请号：US11849900

申请日：2007-09-04

申请人： Ho-Jin OH ,  Sung-Sam LEE ,  Bong-Cheol KIM

发明人： Ho-Jin OH ,  Sung-Sam LEE ,  Bong-Cheol KIM

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/06

CPC分类号： H01L21/823437 ,  H01L21/823412 ,  H01L27/088 ,  H01L29/4236 ,  H01L29/66621 ,  H01L29/7834

摘要： A semiconductor device includes a semiconductor substrate and recess trenches formed on the semiconductor substrate. The recess trenches are arranged to extend along a first direction. Terminal regions of adjacent ones of the recess trenches are offset relative to each other along a second direction substantially perpendicular to the first direction.

摘要翻译： 半导体器件包括半导体衬底和形成在半导体衬底上的凹槽。 凹槽被布置成沿着第一方向延伸。 相邻的凹槽的端子区域沿着基本上垂直于第一方向的第二方向相对于彼此偏移。