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    Division system and method
    1.
    发明授权
    Division system and method 失效
    部门制度与方法

    公开(公告)号：US3591787A

    公开(公告)日：1971-07-06

    申请号：US3591787D

    申请日：1968-01-29

    Applicant: IBM

    Inventor： FREIMAN CHARLES V ,  WANG CHUNG CHIAN

    IPC: G06F7/52 ,  G06F7/535 ,  G06F7/39 ,  G06F7/38

    CPC classification number: G06F7/535 ,  G06F2207/5352

    Abstract: A system and method for digital division employing a composite of table lookup and iteration techniques. A stored logic table is used which generates a factor M which when multiplied against the divisor, provides a new divisor in a predetermined range close to unity in value. Both the divisor and the dividend are then multiplied by the factor M, the capacity of the table lookup determining the maximum difference of the new divisor from unity. The arrangement is such that, depending upon the difference between the new divisor and unity, a selected number of new partial quotient digits is directly determined from a selected number of digits in newly generated partial remainders. By generating quotient digits in successive groups, only a few iterations are needed to divide one long number by another. Successive division steps entail merely the generation of new partial products, and derivation of the difference of these partial products from the previous partial remainder. By arranging the significant portion of the new divisor to be a negative quantity in a preferred form of system, only adder circuits need by employed. A high speed, high capacity binary digital division system utilizing these techniques is further arranged to utilize carry-save adder circuits to utilize carry and sum quantities without introducing carry propagation delays, and otherwise minimize operating cycle time.

    Storage control system
    4.
    发明授权
    Storage control system 失效

    公开(公告)号：US3670309A

    公开(公告)日：1972-06-13

    申请号：US3670309D

    申请日：1969-12-23

    Applicant: IBM

    Inventor： AMDAHL GENE M ,  ARNOLD RICHARD F ,  DAUBER PHILIP S ,  FREIMAN CHARLES V ,  ROBELEN RUSSELL J ,  SCHORR HERBERT ,  WIERZBICKI JOHN R

    IPC: G06F13/10 ,  G06F12/08 ,  G06F13/18 ,  G11C9/00 ,  G06F13/00

    CPC classification number: G06F12/0857 ,  G06F13/18

    Abstract: Described is a storage control system for a two-level storage system. The system includes a high-speed storage against which requests for data are processed and a slower, larger-capacity main storage. Requests for data are received in terms of logical addresses. Requests can be received concurrently at a plurality of request ports where they are buffered in request stacks. A tag storage serves as an index to the data currently resident in high-speed storage, and a directory storage acts as an index to data currently in main storage. A sequence interlock generator is included which interlocks requests in the plurality of request stacks to insure that requests to the same storage area are performed in proper sequence to insure data integrity. When a request is serviced, the logical address is transformed into a plurality of physical addresses in high-speed storage. The corresponding tags from the tag storage and the corresponding data from the high-speed storage are concurrently fetched. A comparison is made of the tags with the transformed address to determine whether the requested data is in high-speed storage. Since request to the same storage entity in high-speed storage or tag storage can be made concurrently by all request ports, conflict resolvers are included to resolve conflicts arising from simultaneous requests to either of these two storages. High-speed storage is divided into storage modules capable of simultaneous operation such that requests from the plurality of request ports can be serviced concurrently. If comparison of the tags indicate that the requested data is available, the request is serviced. An interstorage transfer mechanism is included such that if the requested data is not available in high-speed storage, then the data is retrieved from main storage and placed into high-speed storage for subsequent processing of the request. Concurrently with interstorage transfer, processing of other requests from the request ports is permissible. In the replacement of data from main storage to high-speed storage, provision is made for also replacing data from high-speed storage to main storage if such be necessary.

    Interstorage transfer mechanism
    6.
    发明授权
    Interstorage transfer mechanism 失效
    室内传输机制

    公开(公告)号：US3670307A

    公开(公告)日：1972-06-13

    申请号：US3670307D

    申请日：1969-12-23

    Applicant: IBM

    Inventor： ARNOLD RICHARD F ,  DAUBER PHILIP S ,  FREIMAN CHARLES V ,  ROBELEN RUSSEL J ,  WLERZBICKI JOHN R

    IPC: G06F12/08 ,  G11C9/00 ,  G06F13/00

    CPC classification number: G06F12/0804

    Abstract: Described is an interstorage transfer mechanism suitable for use in a storage control system for a two-level storage, wherein the storage system includes a high-speed storage against which requests for data are processed and a slower, larger-capacity main storage. Requests can be received and serviced concurrently at a plurality of request ports in the system where they are buffered in the request stacks. A tag storage serves as an index to the data concurrently resident in high-speed storage and a directory storage acts as an index to data currently in main storage. Requests for data in each port cause the tag storage to be interrogated to determine whether the desired data is in highspeed storage. If not, then the desired data is retrieved from main storage and placed into high-speed storage by the interstorage transfer mechanism. Priority means for accessing said high-speed storage are provided, said interstorage transfer mechanism being given first priority to access said high-speed and tag storages in case of conflicts in access between said interstorage transfer mechanism and at least one of said plurality of request ports. Means are provided for choosing a target address in High-speed storage wherein said desired data will be relocated. The tag indexing said target address is updated by said interstorage transfer mechanism to reflect the new data. Means are further provided for invalidating all requests currently in transit at the time said tag is changed to insure data integrity in case said requests refer to old data in said target line. The aforementioned tags contain a bit indicating that the corresponding address in high-speed storage has recently been accessed. Cold generator means are provided for periodically resetting this bit in each tag to mark the corresponding high-speed storage physical address as a candidate for replacement target.

    Abstract translation: 描述了适用于两级存储的存储控制系统中的存储间传送机制，其中存储系统包括处理数据请求的高速存储器和较慢容量较大的主存储器。 可以在系统中的多个请求端口并发地接收和服务请求，其中它们被缓存在请求堆栈中。 标签存储用作同时驻留在高速存储器中的数据的索引，并且目录存储器充当当前在主存储器中的数据的索引。 每个端口中的数据请求会导致询问标签存储，以确定所需数据是否处于高速存储。 如果不是，则从主存储器检索所需的数据，并通过机架间传送机制将其置于高速存储器中。 提供了用于访问所述高速存储器的优先级装置，所述存储间传送机制被赋予第一优先权以在所述间间传送机制与所述多个请求端口中的至少一个之间的访问冲突的情况下访问所述高速和标签存储 。 提供了用于在高速存储器中选择目标地址的装置，其中所述所需数据将被重新定位。 所述目标地址索引的标签由所述区间传送机制更新以反映新的数据。 进一步提供用于在所述标签被改变时使当前正在传输的所有请求无效的装置，以在所述请求涉及所述目标行中的旧数据的情况下确保数据完整性。 上述标签包含一个指示最近已经访问了高速存储器中的相应地址的位。 提供冷发生器装置，用于周期性地复位每个标签中的该位，以将相应的高速存储物理地址标记为替换目标的候选。

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