公开(公告)号：US20180012328A1

公开(公告)日：2018-01-11

申请号：US15204402

申请日：2016-07-07

Applicant: Intel Corporation

Inventor： Jeffery S. Boles ,  HEMA C. NALLURI ,  BALAJI VEMBU ,  PRITAV H. SHAH ,  MICHAEL APODACA ,  MURALI RAMADOSS ,  LALIT K. SAPTARSHI

IPC: G06T1/60 ,  G06T1/20

CPC classification number: G06T1/60 ,  G06T1/20

Abstract: A mechanism for command stream processing is described. A method of embodiments, as described herein, includes fetching cache lines from a memory to fill command first in first out buffer (FIFO), wherein the fetched cachelines an overfetching of data necessary to process a command, a first parser to fetch and execute batch commands stored in the command FIFO and a second parser to fetch commands and execute the batch commands and non-batch commands stored in the command FIFO.

公开(公告)号：US20180286009A1

公开(公告)日：2018-10-04

申请号：US15992642

申请日：2018-05-30

Applicant: Intel Corporation

Inventor： JEFFERY S. BOLES ,  HEMA C. NALLURI ,  BALAJI VEMBU ,  MICHAEL APODACA ,  ALTUG KOKER ,  LALIT K. SAPTARSHI

IPC: G06T1/20 ,  G06F3/06 ,  G06F12/0846 ,  G06T1/60 ,  G09G5/36

Abstract: In accordance with some embodiments, a command streamer may use a cache of programmable size to cache commands to improve memory bandwidth and reduce latency. The size of the command cache may be programmably set by the command streamer.

公开(公告)号：US20170357831A1

公开(公告)日：2017-12-14

申请号：US15495644

申请日：2017-04-24

Applicant: INTEL CORPORATION

Inventor： HEMA C. NALLURI ,  ADITYA NAVALE ,  MURALI RAMADOSS

IPC: G06F21/74 ,  G06F21/84 ,  G06T15/00

CPC classification number: G06F21/74 ,  G06F21/84 ,  G06T15/005

Abstract: Techniques are disclosed for processing rendering engine workload of a graphics system in a secure fashion, wherein at least some security processing of the workload is offloaded from software-based security parsing to hardware-based security parsing. In some embodiments, commands from a given application are received by a user mode driver (UMD), which is configured to generate a command buffer delineated into privileged and/or non-privileged command sections. The delineated command buffer can then be passed by the UMD to a kernel-mode driver (KMD), which is configured to parse and validate only privileged buffer sections, but to issue all other batch buffers with a privilege indicator set to non-privileged. A graphics processing unit (GPU) can receive the privilege-designated batch buffers from the KMD, and is configured to disallow execution of any privileged command from a non-privileged batch buffer, while any privileged commands from privileged batch buffers are unrestricted by the GPU