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公开(公告)号：US10192313B2
公开(公告)日：2019-01-29
申请号：US15206058
申请日：2016-07-08
Applicant: INTEL CORPORATION
Inventor： Joshua Ratcliff , Yi Wu , Maha El Choubassi , Yoram Gat , Wei Sun , Kalpana Seshadrinathan , Igor Kozintsev
Abstract: Systems, devices and methods are described including receiving a source image having a foreground portion and a background portion, where the background portion includes image content of a three-dimensional (3D) environment. A camera pose of the source image may be determined by comparing features of the source image to image features of target images of the 3D environment and using the camera pose to segment the foreground portion from the background portion may generate a segmented source image. The resulting segmented source image and the associated camera pose may be stored in a networked database. The camera pose and segmented source image may be used to provide a simulation of the foreground portion in a virtual 3D environment.
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公开(公告)号：US09819875B2
公开(公告)日：2017-11-14
申请号：US14635614
申请日：2015-03-02
Applicant: Intel Corporation
Inventor： Kalpana Seshadrinathan , Ramkumar Narayanswamy , Alexander N. Zaplatin , Joseph A. Hook , Sheldon L. Sun , Igor V. Kozintsev
CPC classification number: H04N5/247 , H04N5/2258 , H04N5/232 , H04N5/23206 , H04N5/23229
Abstract: Techniques for image synchronization are described herein. The techniques may include a device having logic, at least partially including hardware logic, to implement modules. The modules may include a first sync pulse module to issue a first sync pulse after a first sync pulse offset period to a first imaging sensor. The modules may also include a second sync pulse module to issue a second sync pulse parallel to the first sync pulse after a second sync pulse offset period to a second imaging sensor.
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公开(公告)号：US09628695B2
公开(公告)日：2017-04-18
申请号：US14660848
申请日：2015-03-17
Applicant: INTEL CORPORATION
Inventor： Gowri Somanath , Oscar Nestares , Kalpana Seshadrinathan , Yi Wu
CPC classification number: H04N5/23212 , G03B13/36 , H04N13/246 , H04N13/25 , H04N17/002
Abstract: A system, article, and method of lens shift correction for a camera array.
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公开(公告)号：US08995719B2
公开(公告)日：2015-03-31
申请号：US13710312
申请日：2012-12-10
Applicant: Intel Corporation
Inventor： Tao Ma , Yi Wu , Oscar Nestares , Kalpana Seshadrinathan , Wei Sun
CPC classification number: H04N13/243 , G06K9/3233 , G06T5/006 , G06T7/97 , G06T2207/10012 , G06T2207/20228 , H04N5/247 , H04N2013/0081
Abstract: Techniques for improved image disparity estimation are described. In one embodiment, for example, an apparatus may comprise a processor circuit and an imaging management module, and the imaging management module may be operable by the processor circuit to determine a measured horizontal disparity factor and a measured vertical disparity factor for a rectified image array, determine a composite horizontal disparity factor for the rectified image array based on the measured horizontal disparity factor and an implied horizontal disparity factor, and determine a composite vertical disparity factor for the rectified image array based on the measured vertical disparity factor and an implied vertical disparity factor. Other embodiments are described and claimed.
Abstract translation: 描述了用于改进图像差异估计的技术。 在一个实施例中，例如，装置可以包括处理器电路和成像管理模块，并且成像管理模块可以由处理器电路操作以确定经校正的图像阵列的测量的水平视差因子和测量的垂直视差因子 基于测量的水平视差因子和隐含的水平视差因子确定整流图像阵列的复合水平视差系数，并根据测量的垂直视差因子和隐含的垂直视差确定整流图像阵列的复合垂直视差系数 因子。 描述和要求保护其他实施例。
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公开(公告)号：US10771758B2
公开(公告)日：2020-09-08
申请号：US16139880
申请日：2018-09-24
Applicant: INTEL CORPORATION
Inventor： Oscar Nestares , Kalpana Seshadrinathan , Vladan Popovic , Horst Haussecker
IPC: G06T7/70 , H04N13/111 , G06K9/32 , G11B27/022 , H04N9/04 , H04N5/247 , G11B27/031
Abstract: Techniques related to generating a virtual view from multi-view images for presentation to a viewer are discussed. Such techniques include determining, based on a viewer position relative to a display region, first and second crop positions of planar image and cropping the planar image to a cropped planar image to fill the display region using the first and second crop positions such that the first and second crop positions define an asymmetric frustum between the cropped planar image and a virtual window corresponding to the display region.
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Patent Agency Ranking
公开(公告)号：US09875543B2
公开(公告)日：2018-01-23
申请号：US13710294
申请日：2012-12-10
Applicant: INTEL CORPORATION
Inventor： Tao Ma , Wei Sun , Oscar Nestares , Kalpana Seshadrinathan , Dinesh Jayaraman
CPC classification number: G06T7/80 , G06T7/85 , G06T2207/10012 , H04N13/243 , H04N13/246
Abstract: Techniques for rectification of camera arrays are described. In one embodiment, for example, an apparatus may comprise a processor circuit and an imaging management module, and the imaging management module may be operable on the processor circuit to determine a composite rotation matrix for a camera array comprising a plurality of cameras, determine a composite intrinsic parameter matrix for the camera array, and compute one or more rectification maps for the camera array based on the composite rotation matrix and the composite intrinsic parameter matrix, each of the one or more rectification maps corresponding to one of the plurality of cameras. Other embodiments are described and claimed.
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公开(公告)号：US09501826B2
公开(公告)日：2016-11-22
申请号：US14270687
申请日：2014-05-06
Applicant: INTEL CORPORATION
Inventor： Kalpana Seshadrinathan , Oscar Nestares
CPC classification number: G06T7/002 , G06T7/85 , G06T2207/30208 , H04N5/23238 , H04N5/247 , H04N5/2628 , H04N5/357 , H04N13/243 , H04N17/002
Abstract: Rectification techniques for camera arrays in which the resolutions, fields of view, and/or pixel sizes of various cameras may differ from one another are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to receive a captured image array captured by a heterogeneous camera array, select a rectification process for application to the captured image array, identify a set of rectification maps for the selected rectification process, and apply the identified set of rectification maps to the captured image array to obtain a rectified image array. Other embodiments are described and claimed.
Abstract translation: 描述了其中各种相机的分辨率，视场和/或像素尺寸彼此不同的相机阵列的整流技术。 在一个实施例中，例如，设备可以包括其硬件中的至少一部分的逻辑，用于接收由异质摄像机阵列捕获的捕获图像阵列的逻辑，选择用于应用于所捕获的图像阵列的整流过程， 识别所选整流过程的一组整流图，并将识别的整流图集合应用于捕获的图像阵列以获得整流图像阵列。 描述和要求保护其他实施例。
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8.发明申请公开(公告)号：US20180091799A1
公开(公告)日：2018-03-29
申请号：US15278615
申请日：2016-09-28
Applicant: Intel Corporation
Inventor： Kalpana Seshadrinathan , Oscar Nestares
CPC classification number: H04N13/271 , G06K9/4652 , G06K9/6202 , G06K9/6212 , H04N13/133 , H04N13/15 , H04N13/243 , H04N2013/0081
Abstract: A system for robust disparity estimation in the presence of significant intensity variations for camera arrays is described herein. The system comprises a camera array, a memory and a processor. The memory is configured to store imaging data. The processor is coupled to the memory and the camera array. When executing instructions, the processor is to obtain a plurality of images and generate a sequence of color matched images, wherein the sequence includes each pair of images in the plurality of images. The processor is also to calculate a plurality of disparity points based on the sequence of color matched images.
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公开(公告)号：US09900580B2
公开(公告)日：2018-02-20
申请号：US14630469
申请日：2015-02-24
Applicant: Intel Corporation
Inventor： Tao Ma , Yi Wu , Oscar Nestares , Kalpana Seshadrinathan , Wei Sun
CPC classification number: H04N13/243 , G06K9/3233 , G06T5/006 , G06T7/97 , G06T2207/10012 , G06T2207/20228 , H04N5/247 , H04N2013/0081
Abstract: Techniques for improved image disparity estimation are described. In one embodiment, for example, an apparatus may comprise a processor circuit and an imaging management module, and the imaging management module may be operable by the processor circuit to determine a measured horizontal disparity factor and a measured vertical disparity factor for a rectified image array, determine a composite horizontal disparity factor for the rectified image array based on the measured horizontal disparity factor and an implied horizontal disparity factor, and determine a composite vertical disparity factor for the rectified image array based on the measured vertical disparity factor and an implied vertical disparity factor. Other embodiments are described and claimed.
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公开(公告)号：US20160261807A1
公开(公告)日：2016-09-08
申请号：US14635614
申请日：2015-03-02
Applicant: Intel Corporation
Inventor： Kalpana Seshadrinathan , Ramkumar Narayanswamy , Alexander N. Zaplatin , Joseph A. Hook , Sheldon L. Sun , Igor V. Kozintsev
CPC classification number: H04N5/247 , H04N5/2258 , H04N5/232 , H04N5/23206 , H04N5/23229
Abstract: Techniques for image synchronization are described herein. The techniques may include a device having logic, at least partially including hardware logic, to implement modules. The modules may include a first sync pulse module to issue a first sync pulse after a first sync pulse offset period to a first imaging sensor. The modules may also include a second sync pulse module to issue a second sync pulse parallel to the first sync pulse after a second sync pulse offset period to a second imaging sensor.
Abstract translation: 本文描述了用于图像同步的技术。 这些技术可以包括具有至少部分地包括硬件逻辑的逻辑以实现模块的设备。 模块可以包括第一同步脉冲模块，以在第一同步脉冲偏移周期之后向第一成像传感器发出第一同步脉冲。 模块还可以包括第二同步脉冲模块，以在与第二成像传感器的第二同步脉冲偏移周期之后发出平行于第一同步脉冲的第二同步脉冲。
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