公开(公告)号：US10560252B2

公开(公告)日：2020-02-11

申请号：US15088538

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Anthony S. Bock ,  Kevin B. Stanton ,  Christopher S. Hall

IPC: H04L7/00

Abstract: An apparatus for time aware audio streams is described herein. The apparatus includes a converter and an alignment unit. The converter is to perform sample rate conversion of data from a first clock to a second clock. The alignment unit is to indicate valid sample points in the data based on a relationship between the first clock and the second clock.

公开(公告)号：US09083617B2

公开(公告)日：2015-07-14

申请号：US14227875

申请日：2014-03-27

Applicant: Intel Corporation

Inventor： Kevin B. Stanton

IPC: H04W24/00 ,  H04L12/28 ,  H04L12/26 ,  H04L12/851 ,  H04L12/823 ,  H04L12/875

CPC classification number: H04L43/0852 ,  H04L47/24 ,  H04L47/32 ,  H04L47/56

Abstract: An embodiment may include circuitry to determine, at least in part, whether to delay transmission, at least in part, of at least one frame in favor of transmitting at least one other frame. The at least one other frame may belongs to at least one packet stream that is associated with at least one bandwidth reservation. The transmission of the at least one frame may be timed to occur prior to the transmitting of the at least one other frame. The at least one frame, at the time that it is selected for transmission, may have a relatively higher transmission priority than a relatively lower transmission priority of the at least one other frame. Many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract translation: 一个实施例可以包括至少部分地确定至少部分地延迟至少一个帧的传输以有利于发送至少一个其他帧的电路的电路。 至少一个其他帧可以属于与至少一个带宽预留相关联的至少一个分组流。 至少一个帧的传输可以在发送至少一个其他帧之前被定时发生。 在被选择用于传输的时间中的至少一个帧可以具有比所述至少一个其他帧的相对较低的传输优先级相对更高的传输优先级。 在不脱离本实施例的情况下，可以进行许多修改，变型和替换。

公开(公告)号：US11139991B2

公开(公告)日：2021-10-05

申请号：US16722917

申请日：2019-12-20

Applicant: Intel Corporation

Inventor： Kshitij Arun Doshi ,  Ned M. Smith ,  Francesc Guim Bernat ,  Kevin B. Stanton

IPC: H04L29/06 ,  H04L9/32 ,  G06F12/14 ,  H04L9/08 ,  G06F9/455 ,  G06F16/18 ,  G06F16/23 ,  G06F11/10 ,  H04L9/06 ,  H04L12/24 ,  H04L12/26 ,  H04L29/08 ,  G06F9/54 ,  G06F21/60 ,  H04L9/00 ,  H04L12/911 ,  G06F8/41 ,  G06F9/38 ,  G06F9/445 ,  G06F9/48 ,  G06F9/50 ,  G06F11/34 ,  G16Y40/10

Abstract: Various approaches for coordinating edge computing transactions are described, based on the generation and verification of fine-grained timestamp values among distributed computing entities in an edge computing system. In an edge computing system, an edge computing device performs operations to obtain transaction data, a timestamp, and a timestamp signature for a transaction, with the timestamp generated from a secure (and attestable) timestamp procedure that is coordinated with another entity (including via a network-coordinated timestamp synchronization). This timestamp is verified by the device based on the timestamp signature and the transaction data for the transaction, and the transaction is conducted (e.g., using a value of the timestamp) at the device or elsewhere in the system based on successful verification. In further examples, the coordinated timestamp enables multi-version concurrency control (MVCC) database transactions, verification of blockchain transactions, or other uses and verifications of timestamp values.

公开(公告)号：US09014211B2

公开(公告)日：2015-04-21

申请号：US14254540

申请日：2014-04-16

Applicant: Intel Corporation

Inventor： Kevin B. Stanton

IPC: H04L12/26 ,  H04L12/18 ,  H04L12/46 ,  H04L12/911 ,  H04L12/927 ,  H04L12/913

CPC classification number: H04L12/1881 ,  H04L12/4625 ,  H04L47/72 ,  H04L47/724 ,  H04L47/781 ,  H04L47/805 ,  H04L47/822

Abstract: An embodiment may include circuitry that may facilitate, at least in part, assignment, at least in part, of at least one bandwidth reservation for at least one packet stream and/or at least one stream reservation class. The at least one bandwidth reservation may be greater than an expected communication bandwidth of the at least one packet stream. The assignment of the at least one bandwidth reservation may be made prior to commencement of communication of the at least one packet stream. The at least one bandwidth reservation may be assigned exclusively to the at least one packet stream and/or the at least one stream reservation class. Many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract translation: 一个实施例可以包括至少部分地促进至少部分地为至少一个分组流和/或至少一个流预留类分配至少一个带宽预留的电路。 所述至少一个带宽预留可以大于所述至少一个分组流的期望的通信带宽。 可以在至少一个分组流的通信开始之前进行至少一个带宽预留的分配。 所述至少一个带宽预留可专门分配给所述至少一个分组流和/或至少一个流预留类。 在不脱离本实施例的情况下，可以进行许多修改，变型和替换。

公开(公告)号：US10708328B2

公开(公告)日：2020-07-07

申请号：US14215940

申请日：2014-03-17

Applicant: INTEL CORPORATION

Inventor： Christopher Hall ,  Kevin B. Stanton ,  Pierre-Louis Bossart ,  Anthony S. Bock ,  Ohad Falik

IPC: H04L29/08 ,  H04L29/06

Abstract: Techniques to output a media stream, capture a media stream, or synchronize the output or capture of the media stream at a specified time are described. A media stream output or capture apparatus may include a media processor to receive a media stream to output or a request to capture a media stream and a start time. A buffer generator may be included to generate an input or an output buffer and a media mixer may be included to mix the media stream into the output buffer at the start time or capture the media stream from the input buffer at the start time.

公开(公告)号：US20170288847A1

公开(公告)日：2017-10-05

申请号：US15088538

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Anthony S. Bock ,  Kevin B. Stanton ,  Christopher S. Hall

IPC: H04L7/00

CPC classification number: H04L7/0012 ,  G06F5/06 ,  H04L7/0029 ,  H04L25/05

Abstract: An apparatus for time aware audio streams is described herein. The apparatus includes a converter and an alignment unit. The converter is to perform sample rate conversion of data from a first clock to a second clock. The alignment unit is to indicate valid sample points in the data based on a relationship between the first clock and the second clock.