公开(公告)号：US20190147570A1

公开(公告)日：2019-05-16

申请号：US16306315

申请日：2016-07-01

Applicant: INTEL CORPORATION

Inventor： YUNBIAO LIN ,  YADONG LI ,  CHANGLIANG WANG ,  GANG HU

IPC: G06T5/00 ,  G06T5/20

Abstract: Techniques are provided for enhancement of edges in image frames using depth information. A methodology implementing the techniques according to an embodiment includes receiving a color image frame and a depth map frame. The method also includes generating a sharpness mask to control the application of image sharpening to the color pixels. The sharpness mask is based on the value of depth pixels corresponding to the color pixels; and on properties of the depth camera that generated the color image frame, including depth of field, focal distance, and hyperfocal distance. The method further includes calculating sharpness strength for the color pixels. The sharpness strength is proportional to the value of the depth pixel corresponding to the color pixel. The method further includes applying a sharpening filter to the color image frame to enhance edge image features. The sharpening filter is based on the sharpness mask and the sharpness strength.

公开(公告)号：US20180027177A1

公开(公告)日：2018-01-25

申请号：US15550699

申请日：2015-03-23

Applicant: INTEL CORPORATION

Inventor： YUNBIAO LIN ,  JIANHUI DAI ,  NING LUO ,  CHUNBO CHEN

IPC: H04N5/232 ,  G06F9/50 ,  G06F9/48 ,  H04N5/76 ,  H04N5/225

CPC classification number: H04N5/23229 ,  G06F9/4881 ,  G06F9/505 ,  H04N5/2257 ,  H04N5/232 ,  H04N5/23216 ,  H04N5/23241 ,  H04N5/23245 ,  H04N5/23293 ,  H04N5/3765 ,  H04N5/76 ,  H04N5/772

Abstract: Techniques are disclosed to control a camera device such that memory contention and power consumption is reduced during video processing routines, generally referred to herein as media tasks. In particular, a workload scheduler is implemented in a camera HAL and is configured to dispatch captured image frames in an alternating manner between competing media tasks such that the processing of those image frames is performed sequentially, and thus, eliminates or otherwise mitigates memory contention. To this end, techniques variously disclosed herein can be used to enable low-cost, low-memory configured devices to perform concurrent media tasks on captured high-definition video at high framerates, without an undesirable decrease in performance and an increase in power consumption.

公开(公告)号：US20180025465A1

公开(公告)日：2018-01-25

申请号：US15615809

申请日：2017-06-06

Applicant: Intel Corporation

Inventor： YUNBIAO LIN ,  JIANGHONG DU

IPC: G06T1/60

CPC classification number: G06T1/60 ,  G06F9/45533 ,  G06F12/1027 ,  G09G5/363 ,  G09G5/39

Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing GPU (Graphics Processing Unit) accelerated address translation for graphics virtualization. In one embodiment, such a system includes a main memory having a plurality of machine physical addresses; a graphics processor unit having graphics memory therein; an address translation service integrated with the graphics processor unit; a hypervisor to manage one or more guest machines; wherein the hypervisor is to configure a lookup table within the graphics memory of the graphics processor unit; and further wherein the address translation service of the graphics processor unit is to translate a guest physical address for one of the one or more guest machines to a corresponding machine physical address within the main memory. Such a graphics processor unit may be implemented separate from a system, for example, embodied within a silicon integrated circuit.