公开(公告)号：US20180090471A1

公开(公告)日：2018-03-29

申请号：US15279353

申请日：2016-09-28

Applicant: INTEL CORPORATION

Inventor： Chia-Pin CHIU ,  Yoshihiro TOMITA ,  Yoko SEKIHARA ,  Robert L. SANKMAN

IPC: H01L25/10 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/5384 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1052

Abstract: An apparatus is described that includes a package on package structure. The package on package structure includes an interposer to implement electrical interconnections between an upper package of the package on package structure and a lower package of the package on package structure. The interposer has packed wires, the packed wires have respective polygonal cross sections.