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    INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS
    1.
    发明申请
    INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS 有权
    增加容量异质存储元素

    公开(公告)号：US20120287714A1

    公开(公告)日：2012-11-15

    申请号：US13557298

    申请日：2012-07-25

    申请人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    IPC分类号： G11C7/00 ,  G11C11/00 ,  G11C16/04

    CPC分类号： G11C29/08 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2211/5641

    摘要： Providing increased capacity in heterogeneous storage elements including a method for reading from memory. The method includes receiving a read word from a block of memory cells, where physical characteristics of the memory cells support different sets of data levels. The read word is separated into two or more virtual read vectors. For each of the virtual read vectors, the codebook that was utilized to generate the virtual read vector is identified and a partial read data vector is generated. The generating includes multiplying the virtual read vector by a matrix that represents the codebook. The partial read data vectors are combined into a read message and the read message is output.

    摘要翻译： 在异构存储元件中提供增加的容量，包括从存储器读取的方法。 该方法包括从存储器单元块接收读取字，其中存储器单元的物理特性支持不同数据级的集合。 读取的字被分成两个或更多个虚拟读取向量。 对于每个虚拟读取向量，识别用于生成虚拟读取向量的码本，并生成部分读取数据向量。 生成包括将虚拟读取向量乘以代表码本的矩阵。 将部分读取数据矢量组合成读取消息，并输出读出的消息。

    ADJUSTABLE WRITE BINS FOR MULTI-LEVEL ANALOG MEMORIES
    5.
    发明申请
    ADJUSTABLE WRITE BINS FOR MULTI-LEVEL ANALOG MEMORIES 失效
    用于多级模拟记忆体的可调写文字

    公开(公告)号：US20120127790A1

    公开(公告)日：2012-05-24

    申请号：US13355833

    申请日：2012-01-23

    申请人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    IPC分类号： G11C11/00 ,  G06F12/00

    CPC分类号： G11C8/10 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C27/005 ,  G11C2013/0083

    摘要： Selecting bins in a memory by receiving a target cost for performing writes at an analog memory that is capable of storing a range of values. Possible bins that may be created in the range of values and a cost associated with each possible bin are determined. Each possible bin includes one or more of the values. A group of bins are identified, the group of bins are among the possible bins with associated costs that are within a threshold of the target cost. A maximum number of bins are selected from the group of bins that have non-overlapping values. The selected bins are stored along with the values of the selected bins utilized to encode and decode contents of the analog memory.

    摘要翻译： 通过接收在能够存储一定范围的值的模拟存储器上执行写入的目标成本来选择存储器中的存储器。 确定可能在值范围内创建的可能的仓和与每个可能仓相关联的成本。 每个可能的仓包括一个或多个值。 识别出一组垃圾箱，这些垃圾箱是可能的垃圾箱，其相关成本在目标成本的阈值之内。 从具有非重叠值的分组组中选择最大数量的分区。 所选择的存储槽与用于对模拟存储器的内容进行编码和解码的所选择的存储器的值一起存储。

    Adjustable write bins for multi-level analog memories
    6.
    发明授权
    Adjustable write bins for multi-level analog memories 有权
    适用于多级模拟存储器的可调式写入箱

    公开(公告)号：US08125809B2

    公开(公告)日：2012-02-28

    申请号：US12566430

    申请日：2009-09-24

    申请人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    IPC分类号： G11C27/00

    CPC分类号： G11C8/10 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C27/005 ,  G11C2013/0083

    摘要： An analog memory having adjustable write bins including a system for writing to the memory. The system includes a write apparatus interpreting one or more write control signals, generating a write signal, and applying the write signal at a selected memory location to store a desired content. The selected memory location is subject to data dependent noise and is capable of storing a range of values grouped into “n” bins configured such that the average cost to write to at least “n-1” of the bins is within a threshold of a target cost for the selected analog memory location. The system also includes a read apparatus. The system further includes write control circuitry that includes a write signal selector selecting the one or more write control signals responsive to the desired content, current content of the selected memory location, and a bin associated with the desired content.

    摘要翻译： 具有可调节写入箱的模拟存储器，包括用于向存储器写入的系统。 该系统包括解释一个或多个写入控制信号的写入装置，产生写入信号，以及在选择的存储器位置处施加写入信号以存储所需的内容。 所选择的存储器位置受到数据相关噪声的影响，并且能够存储被分配到“n”个存储槽中的值的范围，其被配置为使得写入至少“n-1”个存储单元的平均成本在 所选模拟存储器位置的目标成本。 该系统还包括读取装置。 该系统还包括写控制电路，其包括响应于期望内容选择一个或多个写入控制信号的写入信号选择器，所选择的存储器位置的当前内容以及与期望内容相关联的存储区。

    ADJUSTABLE WRITE BINS FOR MULTI-LEVEL ANALOG MEMORIES
    8.
    发明申请
    ADJUSTABLE WRITE BINS FOR MULTI-LEVEL ANALOG MEMORIES 有权
    用于多级模拟记忆体的可调写文字

    公开(公告)号：US20110069521A1

    公开(公告)日：2011-03-24

    申请号：US12566430

    申请日：2009-09-24

    申请人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    IPC分类号： G11C27/00 ,  G11C11/00

    CPC分类号： G11C8/10 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C27/005 ,  G11C2013/0083

    摘要： An analog memory having adjustable write bins including a system for writing to the memory. The system includes a write apparatus interpreting one or more write control signals, generating a write signal, and applying the write signal at a selected memory location to store a desired content. The selected memory location is subject to data dependent noise and is capable of storing a range of values grouped into “n” bins configured such that the average cost to write to at least “n-1” of the bins is within a threshold of a target cost for the selected analog memory location. The system also includes a read apparatus. The system further includes write control circuitry that includes a write signal selector selecting the one or more write control signals responsive to the desired content, current content of the selected memory location, and a bin associated with the desired content.

    摘要翻译： 具有可调节写入箱的模拟存储器，包括用于向存储器写入的系统。 该系统包括解释一个或多个写入控制信号的写入装置，产生写入信号，以及在选择的存储器位置处施加写入信号以存储所需的内容。 所选择的存储器位置受到数据相关噪声的影响，并且能够存储被分配到“n”个存储槽中的值的范围，其被配置为使得写入至少“n-1”个存储单元的平均成本在 所选模拟存储器位置的目标成本。 该系统还包括读取装置。 该系统还包括写控制电路，其包括响应于期望内容选择一个或多个写入控制信号的写入信号选择器，所选择的存储器位置的当前内容以及与期望内容相关联的存储区。

    Adjustable write bins for multi-level analog memories
    9.
    发明授权
    Adjustable write bins for multi-level analog memories 失效
    适用于多级模拟存储器的可调式写入箱

    公开(公告)号：US08472224B2

    公开(公告)日：2013-06-25

    申请号：US13355833

    申请日：2012-01-23

    申请人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

    IPC分类号： G11C27/00

    CPC分类号： G11C8/10 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C27/005 ,  G11C2013/0083

    摘要： Selecting bins in a memory by receiving a target cost for performing writes at an analog memory that is capable of storing a range of values. Possible bins that may be created in the range of values and a cost associated with each possible bin are determined. Each possible bin includes one or more of the values. A group of bins are identified, the group of bins are among the possible bins with associated costs that are within a threshold of the target cost. A maximum number of bins are selected from the group of bins that have non-overlapping values. The selected bins are stored along with the values of the selected bins utilized to encode and decode contents of the analog memory.

    摘要翻译： 通过接收在能够存储一定范围的值的模拟存储器上执行写入的目标成本来选择存储器中的存储器。 确定可能在值范围内创建的可能的仓和与每个可能仓相关联的成本。 每个可能的仓包括一个或多个值。 识别出一组垃圾箱，这些垃圾箱是可能的垃圾箱，其相关成本在目标成本的阈值之内。 从具有非重叠值的分组组中选择最大数量的分区。 所选择的存储槽与用于对模拟存储器的内容进行编码和解码的所选择的存储器的值一起存储。

    INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS
    10.
    发明申请
    INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS 有权
    增加容量异质存储元素

    公开(公告)号：US20120290778A1

    公开(公告)日：2012-11-15

    申请号：US13557294

    申请日：2012-07-25

    申请人： Ibrahim M. Elfadel ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    IPC分类号： G06F12/00 ,  G06F12/02

    CPC分类号： G11C29/08 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2211/5641

    摘要： Providing increased capacity in heterogeneous storage elements including a method for storing data in a heterogeneous memory that includes receiving a write message and a write address corresponding to a block of memory cells where at least two of the memory cells support different data levels, determining physical characteristics of the memory cells, and identifying virtual memories associated with the block of memory cells in response to the physical characteristics. The following is performed for each of the virtual memories: generating a constraint vector that describes the virtual cells in the virtual memory; and calculating a virtual write vector in response to the constraint vector and the write data, the calculating including writing the write data, bit by bit, in order, into the virtual memory, skipping locations known to be stuck to a particular value as indicated by the constraint vector. The virtual write vectors are combined into a write word and the write word is output to the block of memory cells.

    摘要翻译： 提供异构存储元件中的增加的容量，包括用于在异构存储器中存储数据的方法，该方法包括接收对应于其中至少两个存储器单元支持不同数据电平的存储器单元块的写入消息和写入地址，确定物理特性 并且响应于物理特性识别与存储器单元块相关联的虚拟存储器。 对每个虚拟存储器执行以下操作：生成描述虚拟存储器中的虚拟单元的约束向量; 以及响应于所述约束向量和所述写入数据计算虚拟写入向量，所述计算包括按顺序将所述写入数据逐位写入到所述虚拟存储器中，跳过已知被粘附到特定值的位置，如 约束向量。 虚拟写入向量被组合成写入字，并将写入字输出到存储器单元块。