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Patent Agency Ranking
1.发明授权Semiconductor manufacturing and semiconductor device with semiconductor structure 有权具有半导体结构的半导体制造和半导体器件公开(公告)号：US08921974B2
公开(公告)日：2014-12-30
申请号：US13911106
申请日：2013-06-06
Applicant: Infineon Technologies AG
Inventor： Thoralf Kautzsch , Boris Binder , Uwe Rudolph , Frank Hoffman
CPC classification number: B81C1/00626 , B81B3/0021 , B81B2203/0109 , B81B2203/0315 , B81C1/00182 , B81C2201/0116
Abstract: Embodiments related to semiconductor manufacturing and semiconductor devices with semiconductor structure are described and depicted.
Abstract translation: 描述和描述了与半导体制造有关的实施例和具有半导体结构的半导体器件
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公开(公告)号：US09527725B2
公开(公告)日：2016-12-27
申请号：US14254388
申请日：2014-04-16
Applicant: Infineon Technologies AG
Inventor： Boris Binder , Bernd Foeste , Thoralf Kautzsch , Stefan Kolb , Marco Mueller
CPC classification number: B81C1/0015 , G01L9/0052 , G01L9/0073 , G01L9/0098 , G01L13/025 , G01L15/00
Abstract: A method for fabricating a semiconductor structure includes etching a first opening into a substrate; etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench; fabricating a sense element for sensing a deflection of the lamella; and singulating the semiconductor structure at the chip singulation trench.
Abstract translation: 一种制造半导体结构的方法包括：将第一开口蚀刻成衬底; 将芯片划分沟槽蚀刻到衬底中以在第一开口和芯片单独沟槽之间限定薄片; 制造用于感测薄片偏转的感测元件; 并且在芯片分离沟槽处分离半导体结构。
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3.发明授权Method of providing a semiconductor structure with forming a sacrificial structure 有权提供形成牺牲结构的半导体结构的方法公开(公告)号：US08921954B2
公开(公告)日：2014-12-30
申请号：US13973159
申请日：2013-08-22
Applicant: Infineon Technologies AG
Inventor： Thoralf Kautzsch , Stefan Kolb , Boris Binder , Bernd Foeste , Marco Mueller
IPC: H01L29/84 , H01L21/00 , H01L21/311 , B81C1/00 , G01L9/00 , B81B3/00 , G01L19/06 , H04R31/00 , H04R19/00 , H04R19/04
CPC classification number: B81B3/0021 , B81C1/00158 , G01L9/0045 , G01L19/0636 , H01L29/84 , H04R19/005 , H04R19/04 , H04R31/00
Abstract: A method for providing a semiconductor structure includes forming a sacrificial structure by etching a plurality of trenches from a first main surface of a substrate. The method further includes covering the plurality of trenches at the first main surface with a cover material to define cavities within the substrate, removing a part of the substrate from a second main surface opposite to the first main surface to a depth at which the plurality of trenches are present, and etching away the sacrificial structure from the second main surface of the substrate.
Abstract translation: 提供半导体结构的方法包括通过从衬底的第一主表面蚀刻多个沟槽来形成牺牲结构。 该方法还包括用第一主表面覆盖多个沟槽，以覆盖衬底，以在衬底内限定空腔，从与第一主表面相反的第二主表面移除基底的一部分， 存在沟槽，并且从衬底的第二主表面蚀刻掉牺牲结构。
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4.发明申请SEMICONDUCTOR STRUCTURE WITH LAMELLA DEFINED BY SINGULATION TRENCH 有权半导体结构与LAMELLA定义由SINGULATION TRENCH公开(公告)号：US20140227818A1
公开(公告)日：2014-08-14
申请号：US14254388
申请日：2014-04-16
Applicant: Infineon Technologies AG
Inventor： Boris Binder , Bernd Foeste , Thoralf Kautzsch , Stefan Kolb , Marco Mueller
IPC: B81C1/00
CPC classification number: B81C1/0015 , G01L9/0052 , G01L9/0073 , G01L9/0098 , G01L13/025 , G01L15/00
Abstract: A method for fabricating a semiconductor structure includes etching a first opening into a substrate; etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench; fabricating a sense element for sensing a deflection of the lamella; and singulating the semiconductor structure at the chip singulation trench.
Abstract translation: 一种制造半导体结构的方法包括：将第一开口蚀刻成衬底; 将芯片划分沟槽蚀刻到衬底中以在第一开口和芯片单独沟槽之间限定薄片; 制造用于感测薄片偏转的感测元件; 并且在芯片分离沟槽处分离半导体结构。
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5.发明申请METHOD OF PROVIDING A SEMICONDUCTOR STRUCTURE WITH FORMING A SACRIFICIAL STRUCTURE 审中-公开提供半导体结构与形成非常结构的方法公开(公告)号：US20130334624A1
公开(公告)日：2013-12-19
申请号：US13973159
申请日：2013-08-22
Applicant: Infineon Technologies AG
Inventor： Thoralf Kautzsch , Stefan Kolb , Boris Binder , Bernd Foeste , Marco Mueller
IPC: B81B3/00
CPC classification number: B81B3/0021 , B81C1/00158 , G01L9/0045 , G01L19/0636 , H01L29/84 , H04R19/005 , H04R19/04 , H04R31/00
Abstract: A method for providing a semiconductor structure includes forming a sacrificial structure by etching a plurality of trenches from a first main surface of a substrate. The method further includes covering the plurality of trenches at the first main surface with a cover material to define cavities within the substrate, removing a part of the substrate from a second main surface opposite to the first main surface to a depth at which the plurality of trenches are present, and etching away the sacrificial structure from the second main surface of the substrate.
Abstract translation: 提供半导体结构的方法包括通过从衬底的第一主表面蚀刻多个沟槽来形成牺牲结构。 该方法还包括用第一主表面覆盖多个沟槽，以覆盖衬底，以在衬底内限定空腔，从与第一主表面相反的第二主表面移除基底的一部分， 存在沟槽，并且从衬底的第二主表面蚀刻掉牺牲结构。
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