公开(公告)号：US20190097633A1

公开(公告)日：2019-03-28

申请号：US15714446

申请日：2017-09-25

Applicant: Infineon Technologies AG

Inventor： Igor Ullmann ,  Andreas Kalt ,  Franz Wachter

IPC: H03K19/003 ,  H03K19/0185 ,  H03K3/356 ,  H03K19/00

CPC classification number: H03K19/00384 ,  H03K3/356104 ,  H03K3/35613 ,  H03K3/356182 ,  H03K19/0013 ,  H03K19/00315 ,  H03K19/0175 ,  H03K19/018521

Abstract: High-voltage level-shifter architectures that provide galvanic coupling between low/high-voltage domains while simultaneously enabling high speed operation, low static current consumption and high reliability under a myriad of environmental circumstances including electromagnetic interference as well as process, voltage and temperature variations.

公开(公告)号：US10348304B2

公开(公告)日：2019-07-09

申请号：US15714446

申请日：2017-09-25

Applicant: Infineon Technologies AG

Inventor： Igor Ullmann ,  Andreas Kalt ,  Franz Wachter

IPC: H03K19/003 ,  H03K19/0185 ,  H03K19/00 ,  H03K3/356 ,  H03K19/0175

Abstract: High-voltage level-shifter architectures that provide galvanic coupling between low/high-voltage domains while simultaneously enabling high speed operation, low static current consumption and high reliability under a myriad of environmental circumstances including electromagnetic interference as well as process, voltage and temperature variations.

公开(公告)号：US20170222657A1

公开(公告)日：2017-08-03

申请号：US15421989

申请日：2017-02-01

Applicant: Infineon Technologies AG

Inventor： Igor Ullmann

IPC: H03M3/00

CPC classification number: H03M3/352 ,  H03M3/358 ,  H03M3/414 ,  H03M3/454 ,  H03M3/458 ,  H03M7/3004

Abstract: An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage may be arranged in a multi-stage noise shaping architecture (MASH) architecture.

公开(公告)号：US09871533B2

公开(公告)日：2018-01-16

申请号：US15421989

申请日：2017-02-01

Applicant: Infineon Technologies AG

Inventor： Igor Ullmann

IPC: H03M1/06 ,  H03M3/00

CPC classification number: H03M3/352 ,  H03M3/358 ,  H03M3/414 ,  H03M3/454 ,  H03M3/458 ,  H03M7/3004

Abstract: An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage may be arranged in a multi-stage noise shaping architecture (MASH) architecture.