公开(公告)号：US10348304B2

公开(公告)日：2019-07-09

申请号：US15714446

申请日：2017-09-25

Applicant: Infineon Technologies AG

Inventor： Igor Ullmann ,  Andreas Kalt ,  Franz Wachter

IPC: H03K19/003 ,  H03K19/0185 ,  H03K19/00 ,  H03K3/356 ,  H03K19/0175

Abstract: High-voltage level-shifter architectures that provide galvanic coupling between low/high-voltage domains while simultaneously enabling high speed operation, low static current consumption and high reliability under a myriad of environmental circumstances including electromagnetic interference as well as process, voltage and temperature variations.

公开(公告)号：US20180210027A1

公开(公告)日：2018-07-26

申请号：US15867266

申请日：2018-01-10

Applicant: Infineon Technologies AG

Inventor： Andreas Kalt

IPC: G01R31/26 ,  H01L21/66 ,  G05F1/59

CPC classification number: G01R31/2607 ,  G01R31/2601 ,  G01R31/2884 ,  G05F1/59 ,  H01L22/34

Abstract: Methods and devices are provided. A device may comprise a main current path (11) between a terminal (10) and a supply voltage rail (15). Furthermore, an auxiliary current path (12) coupled to associated measurement circuitry to output a test measurement result (res) is provided.

公开(公告)号：US10079610B2

公开(公告)日：2018-09-18

申请号：US15742435

申请日：2016-07-05

Applicant: Infineon Technologies AG

Inventor： Peter Bogner ,  Andreas Kalt ,  Jaafar Mejri ,  Martin Pernull

IPC: H03M1/10 ,  H03M1/80

CPC classification number: H03M1/1071 ,  H03M1/109 ,  H03M1/12 ,  H03M1/468 ,  H03M1/804

Abstract: Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.

公开(公告)号：US20170118012A1

公开(公告)日：2017-04-27

申请号：US15296940

申请日：2016-10-18

Applicant: Infineon Technologies AG

Inventor： Martin Pernull ,  Andreas Kalt ,  Gerhard Pichler ,  Franz Wachter ,  Bernhard Wotruba

IPC: H04L9/06

CPC classification number: H04L9/0662 ,  H04L2209/08

Abstract: Devices for sampling a plurality of input signals are provided, wherein a sampling device is controlled to sample the input signals in a random order with additional delays. Other embodiments relate to voltage monitoring systems and corresponding methods.

公开(公告)号：US10411883B2

公开(公告)日：2019-09-10

申请号：US15296940

申请日：2016-10-18

Applicant: Infineon Technologies AG

Inventor： Martin Pernull ,  Andreas Kalt ,  Gerhard Pichler ,  Franz Wachter ,  Bernhard Wotruba

IPC: G06F21/00 ,  H04L9/06

Abstract: Devices for sampling a plurality of input signals are provided, wherein a sampling device is controlled to sample the input signals in a random order with additional delays. Other embodiments relate to voltage monitoring systems and corresponding methods.

公开(公告)号：US20190097633A1

公开(公告)日：2019-03-28

申请号：US15714446

申请日：2017-09-25

Applicant: Infineon Technologies AG

Inventor： Igor Ullmann ,  Andreas Kalt ,  Franz Wachter

IPC: H03K19/003 ,  H03K19/0185 ,  H03K3/356 ,  H03K19/00

CPC classification number: H03K19/00384 ,  H03K3/356104 ,  H03K3/35613 ,  H03K3/356182 ,  H03K19/0013 ,  H03K19/00315 ,  H03K19/0175 ,  H03K19/018521

Abstract: High-voltage level-shifter architectures that provide galvanic coupling between low/high-voltage domains while simultaneously enabling high speed operation, low static current consumption and high reliability under a myriad of environmental circumstances including electromagnetic interference as well as process, voltage and temperature variations.

公开(公告)号：US20180198460A1

公开(公告)日：2018-07-12

申请号：US15742435

申请日：2016-07-05

Applicant: Infineon Technologies AG

Inventor： Peter Bogner ,  Andreas Kalt ,  Jaafar Mejri ,  Martin Pernull

IPC: H03M1/10

CPC classification number: H03M1/1071 ,  H03M1/109 ,  H03M1/12 ,  H03M1/468 ,  H03M1/804

Abstract: Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.