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公开(公告)号：US20190280360A1
公开(公告)日：2019-09-12
申请号：US16277398
申请日：2019-02-15
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Andrea Del Chiaro , Christian Schuberth , Peter Singerl , Ji Zhao
Abstract: A device includes at least one electrically conductive structure and at least one stripline. The stripline includes stripline sections that are connected to one another in a series connection between a first terminal and a second terminal. A first subset of the stripline sections is arranged on a first side of the conductive structure and a second subset of the stripline sections is arranged on a second side of the conductive structure. The device also includes at least one conductive connection between the first subset of the stripline sections and the second subset of the stripline sections, wherein the at least one conductive connection is isolated from the at least one electrically conductive structure.
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Patent Agency Ranking
公开(公告)号：US10930990B2
公开(公告)日：2021-02-23
申请号：US16277398
申请日：2019-02-15
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Andrea Del Chiaro , Christian Schuberth , Peter Singerl , Ji Zhao
Abstract: A device includes at least one electrically conductive structure and at least one stripline. The stripline includes stripline sections that are connected to one another in a series connection between a first terminal and a second terminal. A first subset of the stripline sections is arranged on a first side of the conductive structure and a second subset of the stripline sections is arranged on a second side of the conductive structure. The device also includes at least one conductive connection between the first subset of the stripline sections and the second subset of the stripline sections, wherein the at least one conductive connection is isolated from the at least one electrically conductive structure.
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公开(公告)号：US10778156B2
公开(公告)日：2020-09-15
申请号：US15627880
申请日：2017-06-20
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Christian Schuberth , Peter Singerl , Ji Zhao
IPC: H03F3/68 , H03F1/56 , H01L23/00 , H01L23/66 , H01L25/07 , H01L29/20 , H01L29/778 , H01L29/78 , H03F1/02 , H03F3/195
Abstract: A circuit includes a first power transistor stage internally configured to function as a voltage-controlled current source, a second power transistor stage having an input impedance which varies as a function of input power and an interstage matching network coupling an output of the first power transistor stage to an input of the second power transistor stage. The interstage matching network is configured to provide impedance inversion between the input of the second power transistor stage and the output of the first power transistor stage. The impedance inversion provided by the interstage matching network transforms the first power transistor stage from functioning as a voltage-controlled current source to functioning as a voltage-controlled voltage source at the input of the second power transistor stage.
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公开(公告)号：US20180367104A1
公开(公告)日：2018-12-20
申请号：US15627880
申请日：2017-06-20
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Christian Schuberth , Peter Singerl , Ji Zhao
IPC: H03H7/38 , H03F1/56 , H03F1/02 , H03F3/195 , H01L23/66 , H01L29/78 , H01L29/20 , H01L29/778 , H01L23/00 , H01L25/07
Abstract: A circuit includes a first power transistor stage internally configured to function as a voltage-controlled current source, a second power transistor stage having an input impedance which varies as a function of input power and an interstage matching network coupling an output of the first power transistor stage to an input of the second power transistor stage. The interstage matching network is configured to provide impedance inversion between the input of the second power transistor stage and the output of the first power transistor stage. The impedance inversion provided by the interstage matching network transforms the first power transistor stage from functioning as a voltage-controlled current source to functioning as a voltage-controlled voltage source at the input of the second power transistor stage.
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公开(公告)号：US10763228B2
公开(公告)日：2020-09-01
申请号：US16229379
申请日：2018-12-21
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Andrea Del Chiaro , Peter Singerl , Ji Zhao
Abstract: Devices including a transistor having a parasitic capacitance between a control terminal and a load terminal of a first type are provided. Furthermore, the devices include advantageously arranged inductances which are electromagnetically coupled to one another and are configured at least partly to compensate for an effect of the parasitic capacitance in a range around a resonant frequency.
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公开(公告)号：US20190198465A1
公开(公告)日：2019-06-27
申请号：US16229379
申请日：2018-12-21
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Andrea Del Chiaro , Peter Singerl , Ji Zhao
Abstract: Devices including a transistor having a parasitic capacitance between a control terminal and a load terminal of a first type are provided. Furthermore, the devices include advantageously arranged inductances which are electromagnetically coupled to one another and are configured at least partly to compensate for an effect of the parasitic capacitance in a range around a resonant frequency.
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