公开(公告)号：US09239355B1

公开(公告)日：2016-01-19

申请号：US13786325

申请日：2013-03-05

Applicant: Inphi Corporation

Inventor： Andrew Burstein ,  Larry Kan ,  Chien-Hsin Lee ,  Srinivas Bamdhamravuri ,  David Wang

IPC: G06F19/00 ,  G01R31/26 ,  G06F17/00

CPC classification number: G11C29/16 ,  G11C5/04 ,  G11C11/401

Abstract: An interface device for a memory module comprising a plurality of DRAMs includes a memory configured to store DRAM test program instructions, and a programmable processing device coupled to the memory, wherein the programmable processing device is configured to receive input data and input memory addresses from an external processor, wherein the programmable processing device is configured to provide data and memory addresses to the plurality of DRAMs, and wherein the programmable processing device is programmed to perform operations specified by the DRAM test program instructions.

Abstract translation: 包括多个DRAM的存储器模块的接口装置包括被配置为存储DRAM测试程序指令的存储器和耦合到存储器的可编程处理设备，其中可编程处理设备被配置为从一个或多个存储器地址接收输入数据和输入存储器地址 外部处理器，其中所述可编程处理设备被配置为向所述多个DRAM提供数据和存储器地址，并且其中所述可编程处理设备被编程为执行由所述DRAM测试程序指令指定的操作。