公开(公告)号：US20210194468A1

公开(公告)日：2021-06-24

申请号：US16725689

申请日：2019-12-23

Applicant: Intel Corporation

Inventor： Amit Agarwal ,  Steven Hsu ,  Anupama Ambardar Thaploo ,  Simeon Realov ,  Ram Krishnamurthy

IPC: H03K3/037 ,  H03K3/038 ,  G01R31/3177 ,  G01R31/317

Abstract: A family of novel, low power, min-drive strength, double-edge triggered (DET) input data multiplexer (Mux-D) scan flip-flop (FF) is provided. The flip-flop takes the advantage of no state node in the slave to remove data inverters in a traditional DET FF to save power, without affecting the flip-flop functionality under coupling/glitch scenarios.

公开(公告)号：US11054470B1

公开(公告)日：2021-07-06

申请号：US16725689

申请日：2019-12-23

Applicant: Intel Corporation

Inventor： Amit Agarwal ,  Steven Hsu ,  Anupama Ambardar Thaploo ,  Simeon Realov ,  Ram Krishnamurthy

IPC: G01R31/3185 ,  G01R31/317 ,  H03K3/037 ,  G01R31/3177 ,  H03K3/038

Abstract: A family of novel, low power, min-drive strength, double-edge triggered (DET) input data multiplexer (Mux-D) scan flip-flop (FF) is provided. The flip-flop takes the advantage of no state node in the slave to remove data inverters in a traditional DET FF to save power, without affecting the flip-flop functionality under coupling/glitch scenarios.