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公开(公告)号:US11947995B2
公开(公告)日:2024-04-02
申请号:US16878064
申请日:2020-05-19
Applicant: Intel Corporation
Inventor: Kuan Hua Tan , Sahar Khalili , Eng Hun Ooi , Shrinivas Venkatraman , Dimpesh Patel
CPC classification number: G06F9/467 , G06F9/546 , G06F11/3037 , G06F13/1668 , G06F13/385 , G06F13/4221 , G06F2213/0026 , G06F2213/3808
Abstract: A multilevel memory system includes a nonvolatile memory (NVM) device with an NVM media having a media write unit that is different in size than a host write unit of a host controller of the system that has the multilevel memory system. The memory device includes a media controller that controls writes to the NVM media. The host controller sends a write transaction to the media controller. The write transaction can include the write data in host write units, while the media controller will commit data in media write units to the NVM media. The media controller can send a transaction message to indicate whether the write data for the write transaction was successfully committed to the NVM media.
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公开(公告)号:US10942672B2
公开(公告)日:2021-03-09
申请号:US16422827
申请日:2019-05-24
Applicant: Intel Corporation
Inventor: Shrinivas Venkatraman , Eng Hun Ooi , Sahar Khalili , Dimpesh Patel , Kuan Hua Tan
Abstract: Apparatuses, storage media and methods associated with data transfer, are disclosed herein. In some embodiments, an apparatus for computing comprises: a commit generator and a media write generator. The commit generator is arranged to generate commit indicators correspondingly associated with media slices of a storage media to respectively denote to a storage media controller of the storage media whether to proceed with writing the media slices into the storage media. The media write generator is arranged provide data chunks of the media slices to be written into the storage media, and the associated commit indicators to the storage media controller. A size of each data chunk is smaller than a size of each media slice. Other embodiments are also described and claimed.
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公开(公告)号:US11036412B2
公开(公告)日:2021-06-15
申请号:US16585801
申请日:2019-09-27
Applicant: Intel Corporation
Inventor: Sahar Khalili , Zvika Greenfield , Sowmiya Jayachandran , Robert J. Royer, Jr. , Dimpesh Patel
IPC: G06F3/06 , G06F12/0862
Abstract: A multilevel memory subsystem includes a persistent memory device that can access data chunks sequentially or randomly to improve read latency, or can prefetch data blocks to improve read bandwidth. A media controller dynamically switches between a first read mode of accessing data chunks sequentially or randomly and a second read mode of prefetching data blocks. The media controller switches between the first and second read modes based on a number of read commands pending in a command queue.
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