公开(公告)号：US20150357185A1

公开(公告)日：2015-12-10

申请号：US14830681

申请日：2015-08-19

Applicant: Intel Corporation

Inventor： Vinodhkumar Raghunathan ,  Ebrahim ANDIDEH

IPC: H01L21/02 ,  H01L21/768 ,  H01L23/532 ,  H01L23/538 ,  H01L21/48

CPC classification number: H01L21/02271 ,  H01L21/02123 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/4857 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76877 ,  H01L23/49822 ,  H01L23/53228 ,  H01L23/53295 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a CVD dielectric material on a package dielectric material, and then forming a conductive material on the CVD dielectric material.

Abstract translation: 描述了形成微电子封装结构的方法及由此形成的相关结构。 那些方法可以包括在封装电介质材料上形成CVD电介质材料，然后在CVD电介质材料上形成导电材料。