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公开(公告)号:US20250081597A1
公开(公告)日:2025-03-06
申请号:US18240106
申请日:2023-08-30
Applicant: Intel Corporation
Inventor: Leonard P. GULER , Anindya DASGUPTA , Ankit Kirit LAKHANI , Guanqun CHEN , Ian TOLLE , Saurabh ACHARYA , Shengsi LIU , Baofu ZHU , Nikhil MEHTA , Krishna GANESAN , Charles H. WALLACE
IPC: H01L27/088 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/78 , H01L29/786
Abstract: Integrated circuit structures having uniform grid metal gate and trench contact cut, and methods of fabricating integrated circuit structures having uniform grid metal gate and trench contact cut, are described. For example, an integrated circuit structure includes a vertical stack of horizontal nanowires. A gate electrode is over the vertical stack of horizontal nanowires. A conductive trench contact is adjacent to the gate electrode. A dielectric sidewall spacer is between the gate electrode and the conductive trench contact. A first dielectric cut plug structure extends through the gate electrode, through the dielectric sidewall spacer, and through the conductive trench contact. A second dielectric cut plug structure extends through the gate electrode, through the dielectric sidewall spacer, and through the conductive trench contact, the second dielectric cut plug structure laterally spaced apart from and parallel with the first dielectric cut plug structure.