公开(公告)号：US20250167818A1

公开(公告)日：2025-05-22

申请号：US18655458

申请日：2024-05-06

Applicant: Intel Corporation

Inventor： Elan BANIN ,  Eytan MANN ,  Rotem BANIN ,  Ronen GERNIZKY ,  Ofir DEGANI ,  Igal KUSHNIR ,  Shahar PORAT ,  Amir RUBIN ,  Vladimir VOLOKITIN ,  Elinor KASHANI ,  Dmitry FELSENSTEIN ,  Ayal ESHKOLI ,  Tal DAVIDSON ,  Eng Hun OOI ,  Yossi TSFATI ,  Ran SHIMON

IPC: H04B1/04 ,  H04L7/033

Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.

公开(公告)号：US20230090431A1

公开(公告)日：2023-03-23

申请号：US17810845

申请日：2022-07-06

Applicant: Intel Corporation

Inventor： Elan BANIN ,  Eytan MANN ,  Rotem BANIN ,  Ronen GERNIZKY ,  Ofir DEGANI ,  Igal KUSHNIR ,  Shahar PORAT ,  Amir RUBIN ,  Vladimir VOLOKITIN ,  Elinor KASHANI ,  Dmitry FELSENSTEIN ,  Ayal ESHKOLI ,  Tal DAVIDSON ,  Eng Hun OOI ,  Yossi TSFATI ,  Ran SHIMON

IPC: H04B1/04 ,  H04L7/033

Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.

公开(公告)号：US20210265999A1

公开(公告)日：2021-08-26

申请号：US17059480

申请日：2019-08-05

Applicant: Intel Corporation

Inventor： Ofir DEGANI ,  Igal KUSHNIR ,  Elan BANIN ,  Rotem BANIN

IPC: H03L7/099 ,  H03L7/081 ,  H03L7/091 ,  H03B5/32 ,  H04B1/04

Abstract: An apparatus for generating an oscillation signal is provided. The apparatus includes a first oscillator configured to generate a first reference oscillation signal, and a second oscillator configured to generate a second reference oscillation signal. A frequency accuracy of the first oscillator is higher than a frequency accuracy of the second oscillator. Further, an oscillator phase noise of the second oscillator is lower than an oscillator phase noise of the first oscillator. The apparatus further includes a processing circuit configured to generate a third reference oscillation signal based on the first reference oscillation signal and the second reference oscillation signal. Additionally, the apparatus includes a phase-locked loop configured to generate the oscillation signal based on the third reference oscillation signal. A frequency of the oscillation signal is a multiple of a frequency of the third reference oscillation signal.