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    SPECULATIVE EXECUTION OF HIT AND INTERSECTION SHADERS ON PROGRAMMABLE RAY TRACING ARCHITECTURES
    2.
    发明申请
    SPECULATIVE EXECUTION OF HIT AND INTERSECTION SHADERS ON PROGRAMMABLE RAY TRACING ARCHITECTURES 审中-公开

    公开(公告)号：US20200211253A1

    公开(公告)日：2020-07-02

    申请号：US16236176

    申请日：2018-12-28

    Applicant: Intel Corporation

    Inventor： GABOR LIKTOR ,  KARTHIK VAIDYANATHAN ,  JEFFERSON AMSTUTZ ,  ATSUO KUWAHARA ,  MICHAEL DOYLE ,  TRAVIS SCHLUESSLER

    IPC: G06T15/00 ,  G06T15/06 ,  G06T1/60

    Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.

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