公开(公告)号：US20190097313A1

公开(公告)日：2019-03-28

申请号：US15713286

申请日：2017-09-22

Applicant: Intel Corporation

Inventor： JaeJin Lee ,  Dong-Ho Han ,  Hao-Han Hsu

IPC: H01Q1/52 ,  H01Q1/48 ,  H01Q1/38 ,  H01Q1/27 ,  H01Q1/24

CPC classification number: H01Q1/52 ,  H01Q1/242 ,  H01Q1/273 ,  H01Q1/38 ,  H01Q1/48 ,  H05K1/0225 ,  H05K3/3436 ,  H05K2201/09681 ,  H05K2201/10098

Abstract: Embodiments include apparatuses, methods, and systems including an electronic apparatus including an inductor within a circuit package affixed to a printed circuit board (PCB) having a ground layer, where the ground layer includes a mesh area that is substantially void along a contour of the inductor. An electronic apparatus may include a circuit package with an inductor, and a PCB, where the circuit package may be affixed to the PCB. The PCB may have a plurality of layers including a ground layer and a power layer, where the ground layer may be between the power layer and the inductor. The ground layer may include a mesh area that may be substantially void along a contour of the inductor within the circuit package. Other embodiments may also be described and claimed.

公开(公告)号：US10454163B2

公开(公告)日：2019-10-22

申请号：US15713286

申请日：2017-09-22

Applicant: Intel Corporation

Inventor： JaeJin Lee ,  Dong-Ho Han ,  Hao-Han Hsu

IPC: H05K1/02 ,  H01Q1/52 ,  H01Q1/48 ,  H01Q1/24 ,  H01Q1/27 ,  H01Q1/38 ,  H05K3/34

Abstract: Embodiments include apparatuses, methods, and systems including an electronic apparatus including an inductor within a circuit package affixed to a printed circuit board (PCB) having a ground layer, where the ground layer includes a mesh area that is substantially void along a contour of the inductor. An electronic apparatus may include a circuit package with an inductor, and a PCB, where the circuit package may be affixed to the PCB. The PCB may have a plurality of layers including a ground layer and a power layer, where the ground layer may be between the power layer and the inductor. The ground layer may include a mesh area that may be substantially void along a contour of the inductor within the circuit package. Other embodiments may also be described and claimed.