公开(公告)号：US09405340B2

公开(公告)日：2016-08-02

申请号：US13928724

申请日：2013-06-27

Applicant: Intel Corporation

Inventor： Baskaran Ganesan ,  Eric Dehaemer ,  Vinod Ambrose ,  Harjinder Hullon ,  Joseph Doucette ,  Seow Fung Ooi ,  Min Huang ,  Zhiguo Wang ,  Yin-Lung Lu ,  William Johnson Bowhill

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/26 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: In an embodiment, a processor includes a plurality of cores grouped into a plurality of clusters. The clusters are formed based on a corresponding operating voltage of each core at each of a plurality of frequencies. Each cluster includes a unique set of cores and at least one cluster includes at least two of the cores. The processor also includes a power control unit (PCU) including frequency/voltage control logic, responsive to a frequency change request for a first core of a first cluster, to determine an operating voltage for the first core from a first cluster voltage-frequency (V-F) table associated with the first cluster. The first cluster V-F table uniquely specifies a corresponding operating voltage at each of a plurality of frequencies of operation of the cores of the first cluster. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，处理器包括分组为多个群集的多个核心。 基于在多个频率中的每一个处的每个核心的对应的工作电压来形成簇。 每个集群包括唯一的一组核心，并且至少一个集群包括至少两个核心。 所述处理器还包括功率控制单元（PCU），其响应于对第一集群的第一核心的频率变化请求而包括频率/电压控制逻辑，以从第一集群电压 - 频率（ VF）表与第一个集群关联。 第一簇V-F表在第一簇的核的多个操作频率的每一个上唯一地指定对应的工作电压。 描述和要求保护其他实施例。