公开(公告)号：US11049266B2

公开(公告)日：2021-06-29

申请号：US16050468

申请日：2018-07-31

Applicant: Intel Corporation

Inventor： Scott Janus ,  Barnan Das ,  Hugues Labbe ,  Jong Dae Oh ,  Gokcen Cilingir ,  James Holland ,  Narayan Biswal ,  Yi-Jen Chiu ,  Qian Xu ,  Mayuresh Varerkar ,  Sang-Hee Lee ,  Stanley Baran ,  Srikanth Potluri ,  Jason Ross ,  Maruthi Sandeep Maddipatla

IPC: G06T7/262 ,  H04N19/436 ,  G06T3/40 ,  G06T15/08 ,  G06T17/00 ,  G06T7/30

Abstract: An apparatus comprises a processor to divide a first point cloud data set frame representing a three dimensional space at a first point in time into a matrix of blocks, determine at least one three dimensional (3D) motion vector for at least a subset of blocks in the matrix of blocks, generate a predicted second point cloud data set frame representing a prediction of the three dimensional space at a second point in time by applying the at least one 3D motion vector to the subset of blocks in the matrix of blocks, compare the predicted second point cloud data set frame to a second point cloud data set frame representing a prediction of the three dimensional space at a second point in time to generate a prediction error parameter, and encode the second point cloud data set frame as a function of the first point cloud data set frame and the at least one three dimensional (3D) motion vector when the prediction error factor is beneath an error threshold to produce an encoded second point cloud data set frame.

公开(公告)号：US20200043182A1

公开(公告)日：2020-02-06

申请号：US16050468

申请日：2018-07-31

Applicant: Intel Corporation

Inventor： Scott Janus ,  Barnan Das ,  Hugues Labbe ,  Jong Dae Oh ,  Gokcen Cilingir ,  James Holland ,  Narayan Biswal ,  Yi-Jen Chiu ,  Qian Xu ,  Mayuresh Varerkar ,  Sang-Hee Lee ,  Stanley Baran ,  Srikanth Potluri ,  Jason Ross ,  Maruthi Sandeep Maddipatla

IPC: G06T7/262 ,  G06T3/40 ,  G06T7/30 ,  G06T15/08 ,  G06T17/00

Abstract: Embodiments described herein provide an apparatus comprising a processor to divide a first point cloud data set frame representing a three dimensional space at a first point in time into a matrix of blocks, determine at least one three dimensional (3D) motion vector for at least a subset of blocks in the matrix of blocks, generate a predicted second point cloud data set frame representing a prediction of the three dimensional space at a second point in time by applying the at least one 3D motion vector to the subset of blocks in the matrix of blocks, compare the predicted second point cloud data set frame to a second point cloud data set frame representing a prediction of the three dimensional space at a second point in time to generate a prediction error parameter, and encode the second point cloud data set frame as a function of the first point cloud data set frame and the at least one three dimensional (3D) motion vector when the prediction error factor is beneath an error threshold to produce an encoded second point cloud data set frame. Other embodiments may be described and claimed.

公开(公告)号：US20240406380A1

公开(公告)日：2024-12-05

申请号：US18798562

申请日：2024-08-08

Applicant: Intel Corporation

Inventor： Qian Xu ,  Jian Hu ,  Navyasree Matturu ,  Dmitry E. Ryzhov ,  Satya N. Yedidi

IPC: H04N19/105 ,  H04N19/176

Abstract: A block of a video frame can be encoded using inter-prediction, and the motion vector of the block can be encoded based on a motion vector reference of a merge candidate. Some video codecs allow a large range of temporal and spatial neighbors to be considered as potential merge candidates. It is not practical to perform motion compensation and rate-distortion optimization for all possible merge candidates. To address this concern, a hardware-efficient process can be implemented to rank and select merge candidates. A reference frame priority list is applied to select a subset of potential reference frame combinations. An efficient top-K sorting algorithm is applied to identify merge candidates for each reference frame combination and keep top merge candidates with highest weights. Motion compensation and rate-distortion optimization are performed on the top merge candidates only.

公开(公告)号：US11729403B2

公开(公告)日：2023-08-15

申请号：US16647998

申请日：2017-12-05

Applicant: INTEL CORPORATION

Inventor： James Holland ,  Hiu-Fai Chan ,  Fangwen Fu ,  Qian Xu ,  Sang-Hee Lee ,  Vidhya Krishnan

IPC: H04N11/02 ,  H04N19/182 ,  H04N19/423

CPC classification number: H04N19/182 ,  H04N19/423

Abstract: A lossless pixel compressor may include technology to detect a format of a pixel memory region, and compress the pixel memory region together with embedded control information which indicates the detected format of the pixel memory region. Other embodiments are disclosed and claimed.

公开(公告)号：US20240259568A1

公开(公告)日：2024-08-01

申请号：US18635840

申请日：2024-04-15

Applicant: Intel Corporation

Inventor： Qian Xu ,  Ximin Zhang ,  Yi-jen Chiu

IPC: H04N19/147 ,  H04N19/105 ,  H04N19/137 ,  H04N19/176

CPC classification number: H04N19/147 ,  H04N19/105 ,  H04N19/137 ,  H04N19/176

Abstract: Different approaches for reducing complexity and computations in inter-prediction encoding are described. The approaches may involve one or more of quantization parameter and motion information being used to make a precision decision at a picture level that can improve compression efficiency. The approaches may involve finding prediction costs for the motion vector difference candidates and then performing rate-distortion optimization using the selected motion vector difference candidate having the lowest prediction cost. Prediction costs may be determined using sums of absolute transformed differences, which can be calculated efficiently in hardware. The rate-distortion cost of using merge mode with motion vector difference with the selected motion vector difference candidate may be compared against one or more other rate-distortion costs. In addition, in some scenarios, the approaches may involve finding prediction costs for a subset of the motion vector difference candidates to further reduce computations.

公开(公告)号：US20200288152A1

公开(公告)日：2020-09-10

申请号：US16647998

申请日：2017-12-05

Applicant: INTEL CORPORATION

Inventor： James Holland ,  Hiu-Fai Chan ,  Fangwen Fu ,  Qian Xu ,  Sang-Hee Lee ,  Vidhya Krishnan

IPC: H04N19/182 ,  H04N19/423

Abstract: A lossless pixel compressor may include technology to detect a format of a pixel memory region, and compress the pixel memory region together with embedded control information which indicates the detected format of the pixel memory region. Other embodiments are disclosed and claimed.