公开(公告)号：US20200006643A1

公开(公告)日：2020-01-02

申请号：US16024712

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Tanay GOSAVI ,  Sasikanth MANIPATRUNI ,  Chia-Ching LIN ,  Gary ALLEN ,  Scott B. CLENDENING ,  Ian YOUNG

IPC: H01L43/12 ,  H01L43/02 ,  H01F10/32 ,  H01F41/34 ,  G11C11/16 ,  H01L27/22

Abstract: Embodiments herein relate to manufacturing a magnetic random access memory (MRAM). In particular, a process may include coupling a side of a magnetic free layer of a magnetic tunnel junction (MTJ) to a first side of a hybrid spin orbit torque (SOT) electrode-insert layer, coupling a first side of an atomic layer etching (ALE) etch layer to a second side of the hybrid SOT electrode-insert layer opposite the first side, applying an interlayer dielectric (ILD) layer to edges of the MTJ, the SOT electrode and the etch layers, the ILD layer in a plane substantially perpendicular to a plane of the MTJ, SOT electrode and ALE etch layers, and etching the ALE etch layer using ALE until the SOT layer is exposed.