公开(公告)号：US12300918B2

公开(公告)日：2025-05-13

申请号：US17479596

申请日：2021-09-20

Applicant: Intel Corporation

Inventor： Navneet Kumar Singh ,  Aiswarya M. Pious ,  Richard S. Perry ,  Amarjeet Kumar ,  Siva Prasad Jangili Ganga ,  Gaurav Hada ,  Sushil Padmanabhan ,  Konika Ganguly

IPC: H01R12/00 ,  H01R12/70 ,  H01R12/73 ,  H01R43/26

Abstract: A connector to connect an electronic module to an edge of a first electronic circuit board is described. The module has a second electronic circuit board. The connector has a top part that houses a first row of I/Os. The top part is to be placed on a surface of the first electronic circuit board. The connector has a bottom part that houses a second row of I/Os. The bottom part is to be placed on an opposite surface of the first electronic circuit board, wherein, the top and bottom parts form inner and outer stand-offs when mater together. The inner stand-off is to reside within a through hole of the first electronic circuit board. The outer stand-off is to reside within free space off the edge of the first electronic circuit board. The second electronic circuit board is to be pressed in between the first row of I/Os and the second row of I/Os when the module is connected to the connector.

公开(公告)号：US20220095456A1

公开(公告)日：2022-03-24

申请号：US17543311

申请日：2021-12-06

Applicant: Intel Corporation

Inventor： Arumanayagam Rajasekar ,  Tin Poay Chuah ,  Sushil Padmanabhan ,  Aiswarya M. Pious ,  Navneet Kumar Singh

IPC: H05K1/11 ,  H05K1/02 ,  H05K1/14

Abstract: In one embodiment, a printed circuit board includes a first circuit board portion comprising a set of first conducting layers and one or more plated through hole (PTH) vias formed through the first conducting layers and a second circuit board portion comprising a set of second conducting layers. The second circuit board portion has an area less than an area of the first circuit board portion, and the second circuit board portion is coupled to the first circuit board portion via a laminate layer such that the first and second conducting layers are parallel with one another. The printed circuit board further includes one or more PTH vias formed through the first and second conducting layers in an area of the printed circuit board where the first and second circuit board portions overlap.