公开(公告)号：US20190304893A1

公开(公告)日：2019-10-03

申请号：US15942952

申请日：2018-04-02

Applicant: Intel Corporation

Inventor： Vincent DORGAN ,  Jeffrey HICKS ,  Uddalak BHATTACHARYA ,  Zhanping CHEN ,  Walid M. HAFEZ

IPC: H01L23/50 ,  H01L21/77 ,  H01L21/768

Abstract: Embodiments herein may describe techniques for an integrated circuit including a metal interconnect above a substrate and coupled to a first contact and a second contact. The first contact and the second contact may be above the metal interconnect and in contact with the metal interconnect. A first resistance may exist between the first contact and the second contact through the metal interconnect. After a programming voltage is applied to the second contact while the first contact is coupled to a ground terminal to generate a current between the first contact and the second contact, a non-conducting barrier may be formed as an interface between the second contact and the metal interconnect. A second resistance may exist between the first contact, the metal interconnect, the second contact, and the non-conducting barrier. Other embodiments may be described and/or claimed.

公开(公告)号：US20190304907A1

公开(公告)日：2019-10-03

申请号：US15943541

申请日：2018-04-02

Applicant: Intel Corporation

Inventor： Yu-Lin CHAO ,  Sarvesh H. KULKARNI ,  Vincent E. DORGAN ,  Uddalak BHATTACHARYA

IPC: H01L23/525 ,  H01L27/02 ,  H01L27/112 ,  H01L29/78

Abstract: Embodiments herein may describe techniques for an integrated circuit including a MOSFET having a source area, a channel area, a gate electrode, and a drain area. The channel area may include a first channel region with a dopant of a first concentration next to the source area, and a second channel region with the dopant of a second concentration higher than the first concentration next to the drain area. A source electrode may be in contact with the source area, a gate oxide layer above the channel area, and the gate electrode above the gate oxide layer. A first resistance exists between the source electrode and the gate electrode. A second resistance exists between the source electrode, the gate electrode, and a path through the gate oxide layer to couple the source electrode and the gate electrode after a programming operation is performed. Other embodiments may be described and/or claimed.