公开(公告)号：US11003610B2

公开(公告)日：2021-05-11

申请号：US16779377

申请日：2020-01-31

Applicant: Intel Corporation

Inventor： Zuoguo Wu ,  Mahesh Wagh ,  Debendra Das Sharma ,  Gerald S. Pasdast ,  Ananthan Ayyasamy ,  Xiaobel Li ,  Robert G. Blankenship ,  Robert J. Safranek

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/12 ,  G06F15/173 ,  G06F1/10

Abstract: Physical layer logic is provided that is to receive data on one or more data lanes of a physical link, receive a valid signal on another of the lanes of the physical link identifying that valid data is to follow assertion of the valid signal on the one or more data lanes, and receive a stream signal on another of the lanes of the physical link identifying a type of the data on the one or more data lanes.