公开(公告)号：US20250159932A1

公开(公告)日：2025-05-15

申请号：US18389427

申请日：2023-11-14

Applicant: Intel Corporation

Inventor： Chiao-Ti HUANG ,  Swapnadip GHOSH ,  Matthew PRINCE ,  Omair SAADAT ,  Yulia GOTLIB ,  Rajaram PAI ,  Reza BAYATI ,  Ryan PEARCE ,  Lin HU

IPC: H01L29/423 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: Integrated circuit structures having metal gate cut plug structures are described. For example, an integrated circuit structure includes a vertical stack of horizontal nanowires. A gate electrode is over the vertical stack of horizontal nanowires. A conductive trench contact is adjacent to the gate electrode. A dielectric sidewall spacer is between the gate electrode and the conductive trench contact. A dielectric cut plug structure extends through the gate electrode, through the dielectric sidewall spacer, and through the conductive trench contact. The dielectric cut plug structure includes silicon and oxygen, with oxygen in direct contact with a metal-containing layer of the gate electrode.