MARGINING PIN INTERFACE CIRCUIT FOR CLOCK ADJUSTMENT OF DIGITAL TO ANALOG CONVERTER
    1.
    发明申请
    MARGINING PIN INTERFACE CIRCUIT FOR CLOCK ADJUSTMENT OF DIGITAL TO ANALOG CONVERTER 失效
    用于时钟调整数字到模拟转换器的接口引脚接口电路

    公开(公告)号:US20040178940A1

    公开(公告)日:2004-09-16

    申请号:US10389374

    申请日:2003-03-14

    CPC classification number: H03M1/002 H03M1/66

    Abstract: A voltage margin setting interface circuit has a single input pin, and is configured to program the slew rate and polarity direction of variation of the operation of a digital-to-analog converter, such as may be used to set a reference voltage level, for application to an error amplifier of a voltage regulator circuit of the power supply of a personal computer. A DAC clocking control circuit is coupled to an output port, and to respective DAC increment and decrement ports, and is operative to control the magnitude of output current, and to assert an output signal at one of the increment and decrement ports, in accordance with a prescribed relationship between the voltage and upper and lower ranges of the input voltage relative to its middle value.

    Abstract translation: 电压余量设定接口电路具有单个输入引脚,并且被配置为对数/模转换器的操作变化的转换速率和极性方向进行编程,诸如可用于设置参考电压电平,以供 应用于个人计算机的电源的电压调节器电路的误差放大器。 DAC时钟控制电路耦合到输出端口和相应的DAC增量和减小端口,并且可操作以控制输出电流的大小,并且根据增量和减量端口中的一个端口断言输出信号 电压与输入电压的上下范围相对于其中间值的规定关系。

    MARGINING PIN INTERFACE AND CONTROL CIRCUIT
    2.
    发明申请
    MARGINING PIN INTERFACE AND CONTROL CIRCUIT 失效
    引脚接口和控制电路

    公开(公告)号:US20040174205A1

    公开(公告)日:2004-09-09

    申请号:US10379140

    申请日:2003-03-04

    CPC classification number: G05F3/262

    Abstract: A voltage margin circuit has an input that receives a control voltage for programming an output reference voltage. The control voltage is coupled through an input resistor to an operational amplifier, referenced to a voltage midway between the voltage range of the input voltage and having its output coupled to a pair of transistors, whose current flow paths are coupled to inputs of a first pair of current mirrors. Outputs of the first current mirrors pair are cross-coupled to inputs of a second current mirrors pair. Outputs of the second current mirror pair are coupled through an output resistor to a prescribed voltage. The output reference voltage is the sum of the prescribed voltage and an offset as the product of the output resistor and an output current supplied by one of the third and fourth current mirrors.

    Abstract translation: 电压余量电路具有接收用于编程输出参考电压的控制电压的输入。 控制电压通过输入电阻器耦合到运算放大器,参考输入电压的电压范围之间的中间电压,并且其输出耦合到一对晶体管,其电流流动路径耦合到第一对的输入 的电流镜。 第一电流镜对的输出交叉耦合到第二电流镜对的输入。 第二电流镜对的输出通过输出电阻器耦合到规定的电压。 输出参考电压是作为输出电阻和由第三和第四电流镜之一提供的输出电流的乘积的规定电压和偏移之和。

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