公开(公告)号：US20220398201A1

公开(公告)日：2022-12-15

申请号：US17685962

申请日：2022-03-03

Applicant: KIOXIA CORPORATION

Inventor： Masataka GOTO ,  Kohei OKUDA ,  Takahiro KURITA

IPC: G06F12/1027 ,  G06F3/06 ,  G06F12/0891

Abstract: An information processing apparatus includes a network interface, a storage device, and a processor. The processor is configured to assign a plurality of zones in the storage device. Each of the zones is a contiguous physical address range of the storage device that is mapped to a contiguous logical address range. The processor is configured to generate zone management information for each of the plurality of zones, store content received from the origin server via the network interface, in one of writable zones and update a writable address of the zone management information for the one of the writable zones. The processor is configured to operate to transmit the received content, and control the storage device to delete data stored therein in units of a zone upon a predetermined cache clearing criteria being met.

公开(公告)号：US20230385462A1

公开(公告)日：2023-11-30

申请号：US18168211

申请日：2023-02-13

Applicant: Kioxia Corporation

Inventor： Kohei OKUDA ,  Hayato FUJIWARA ,  Tatsuya HOSOKAWA ,  Hiroyasu NAKATSUKA ,  Ge WANG

IPC: G06F21/81

CPC classification number: G06F21/81

Abstract: A memory system includes a first controller, a nonvolatile memory connected to the first controller, and a power supply circuit that applies a voltage to the first controller and the nonvolatile memory. The first controller writes first data to a first address in the nonvolatile memory and instructs the power supply circuit to apply the destruction voltage to the nonvolatile memory. The first controller determines whether the first data can be correctly read from the first address in the nonvolatile memory and checks destruction of the nonvolatile memory based on the determination.

公开(公告)号：US20210278972A1

公开(公告)日：2021-09-09

申请号：US17118996

申请日：2020-12-11

Applicant: Kioxia Corporation

Inventor： Takeshi ISHIHARA ,  Yohei HASEGAWA ,  Shinichi KANNO ,  Kohei OKUDA ,  Masataka GOTO

IPC: G06F3/06

Abstract: According to one embodiment, a storage device includes a non-volatile memory and a control unit that is electrically connected to the non-volatile memory and that is configured to control the non-volatile memory. The control unit is configured to manage a plurality of management areas obtained by logically partitioning storage area of the non-volatile memory, when a write request is received that includes data for which a valid term has been set, determine, based on the valid term, a first management area from among the management areas, write the data included in the write request to the determined first management area, and when the data written to the first management area is erased, collectively erase all data written in the first management area which includes the data.