摘要:
The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.
摘要:
The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of a switch mode DC-DC converter. The electronic device is configured to reduce a bias current of the comparator with a first slope in response to a decreasing load and to increase the bias current of the comparator with a second slope in response to an increasing load, wherein the second slope is steeper than the first slope.
摘要:
An integrated circuit including a precharge circuit for a DC/DC boost converter which includes a reference current circuit with a MOSFET transistor (MP4) that has a gate connected with the gate of the DC/DC boost converter's power MOSFET transistor (MP5) to form a current mirror. The precharge circuit works to approach the output voltage to the supply voltage prior to the converter startup. An included regulation circuit adjusts the gate potential at the power MOSFET transistor (MP5) and at the MOSFET transistor (MP4) in the reference circuit in response to a reduction of the drain-source voltage of the power MOSFET transistor (MP5) due to precharging load capacitance, in a sense to keep the precharge current through the power MOSFET transistor (MP5) constant.
摘要:
An integrated circuit including a precharge circuit for a DC/DC boost converter is disclosed with an inductor (L1), a power MOSFET transistor (MP5) connected in series with the inductor between a supply terminal and a load (Rload, Cload) that has a second end connected to ground. This precharge circuit further includes a reference current circuit with a MOSFET transistor (MP4) that has a gate connected with the gate of the power MOSFET transistor (MP5) to form a current mirror. The precharge circuit works to approach the output voltage to the supply voltage prior to the converter startup. An included regulation circuit adjusts the gate potential at the power MOSFET transistor (MP5) and at the MOSFET transistor (MP4) in the reference circuit in response to a reduction of the drain-source voltage of the power MOSFET transistor (MP5), in a sense to keep the precharge current through the power MOSFET transistor (MP5) constant.
摘要:
A converter has a main feedback path and two auxiliary feedback paths from an output node to an auxiliary differential input pair of a comparator. The auxiliary feedback paths have different RC time constants so that a differential ramp signal is effectively applied to the auxiliary differential inputs of the comparator. The circuit design compensates for a negligibly small equivalent series resistor of an output capacitor so that modern capacitors may be used without compromising the stable oscillation of the converter.
摘要:
In the proposed method of generating a pulsed output signal from a periodic ramp signal and a reference voltage, the linear range of duty cycles of the pulsed output signal is significantly extended to minimum values. The ramp signal and the reference voltage are applied to inputs of a comparator and the output signal is taken from an output of the comparator. The ramp signal has a ramp that extends between a minimum voltage level and a maximum voltage level. The duty cycle of the pulse signal is controlled by varying the reference voltage between the minimum and maximum voltage levels. The ramp has an initial start section extending from the minimum voltage level and a main section extending between the initial section and the maximum voltage level. The ramp slope has a constant value over the main ramp section and a value greater than the constant value over the initial section. In the initial section of the ramp the slope is varied in a manner to compensate for non-linearity of the comparator in an operating range where the reference voltage is close to the minimum voltage level of the ramp signal. It is also preferred to insert a short blanking period before the actual ramp of the waveform. The method can be used in switched mode power converters and in class-d amplifiers.
摘要:
A self-oscillating DC-DC buck converter with zero hysteresis is described. The converter comprises a comparator with a supply input, a non-inverting input to which a reference voltage is applied, an inverting input to which a feedback signal is applied, and an output to which a filter network is connected. The feedback signal is derived from the filter network and the output voltage of the converter is determined by the reference voltage. Connecting a filter network with an inductor and a capacitor to the output of the comparator and deriving the feedback signal from the filter network, results in an output of the comparator which is a DC output with a superimposed ripple. The level of the DC output is controlled by the reference voltage applied to the non-inverting input of the comparator, and the inductor current develops the ripple in the equivalent series resistance of the load circuit connected to the comparator output. The ripple can be regarded as the ramp signal in a conventional DC-DC converter. Accordingly, the output voltage is regulated to follow the reference voltage, and the proposed topology is equivalent to a DC-DC buck converter.
摘要:
A switch mode power converter is provided which includes a switching cell with a supply input, an output and a control input. A summing comparator has first and second differential input pairs and an output. The output is connected to the control input of the switching cell. An oscillator provides a periodic waveform that is applied to a first one of the inputs of the first differential input pair of the summing comparator. An adjustable reference voltage source provides an adjustable reference voltage a predetermined fraction of which is applied to a second one of the inputs of the first differential input pair of the summing comparator. An error amplifier has differential outputs coupled to the second pair of differential inputs of the summing comparator and a differential input pair. A first input of the differential input pair is coupled to the output of the switching cell, and the adjustable reference voltage from the adjustable reference voltage source is applied to a second input of the differential input pair. Thus, the desired DC voltage is scaled to produce a DC reference for the comparator which generates the desired duty cycle for the pulse signal that drives the switching cell, and thus the desired regulated output voltage, with only minor corrections required across the error terminals to correct small parasitic terms.
摘要:
A self-oscillating DC-DC buck converter with zero hysteresis is described. The converter comprises a comparator with a supply input, a non-inverting input to which a reference voltage is applied, an inverting input to which a feedback signal is applied, and an output to which a filter network is connected. The feedback signal is derived from the filter network and the output voltage of the converter is determined by the reference voltage. Connecting a filter network with an inductor and a capacitor to the output of the comparator and deriving the feedback signal from the filter network, results in an output of the comparator which is a DC output with a superimposed ripple. The level of the DC output is controlled by the reference voltage applied to the non-inverting input of the comparator, and the inductor current develops the ripple in the equivalent series resistance of the load circuit connected to the comparator output. The ripple can be regarded as the ramp signal in a conventional DC-DC converter. Accordingly, the output voltage is regulated to follow the reference voltage, and the proposed topology is equivalent to a DC-DC buck converter.
摘要:
In the proposed method of generating a pulsed output signal from a periodic ramp signal and a reference voltage, the linear range of duty cycles of the pulsed output signal is significantly extended to minimum values. The ramp signal and the reference voltage are applied to inputs of a comparator and the output signal is taken from an output of the comparator. The ramp signal has a ramp that extends between a minimum voltage level and a maximum voltage level. The duty cycle of the pulse signal is controlled by varying the reference voltage between the minimum and maximum voltage levels. The ramp has an initial start section extending from the minimum voltage level and a main section extending between the initial section and the maximum voltage level. The ramp slope has a constant value over the main ramp section and a value greater than the constant value over the initial section. In the initial section of the ramp the slope is varied in a manner to compensate for non-linearity of the comparator in an operating range where the reference voltage is close to the minimum voltage level of the ramp signal. It is also preferred to insert a short blanking period before the actual ramp of the waveform. The method can be used in switched mode power converters and in class-d amplifiers.