Abstract:
An array substrate having a wiring of a pad region formed without an insulating film or without an insulating film and an organic film to reduce abnormal operations due to an increase in resistance caused by a contact margin at a high temperature, and a method for manufacturing the same are provided. The array substrate includes: an insulating substrate including a pad region and a thin film transistor (TFT) formation region; a first electrode layer formed in the pad region of the substrate; and a second electrode formed on the first electrode layer in an overlapping manner.
Abstract:
Disclosed are a display device and a driving method thereof, which solve a problem where consumption power of a sync side increases when a remote frame buffer is used by applying PSR technology and MBO technology to the sync side. The display device includes a display panel displaying an image, a source side generating raw digital video data and supplying first digital video data generated by omitting at least one active frame in the raw digital video data, a sync side receiving the first digital video data, copying digital video data of an active frame, which is adjacent to the at least one active frame, to the at least one active frame to generate second digital video data, and generating a data driver control signal, and a data driver receiving the second digital video data and the data driver control signal to supply data voltages to the display panel.
Abstract:
An array substrate having a wiring of a pad region formed without an insulating film or without an insulating film and an organic film to reduce abnormal operations due to an increase in resistance caused by a contact margin at a high temperature, and a method for manufacturing the same are provided. The array substrate includes: an insulating substrate including a pad region and a thin film transistor (TFT) formation region; a first electrode layer formed in the pad region of the substrate; and a second electrode formed on the first electrode layer in an overlapping manner.
Abstract:
Discussed is a timing controller. The timing controller includes a receiver, a converter, an aligner, and an EPI transmitter. The receiver receives input RGB data from an external system. The converter converts the input RGB data into input WRGB data. The aligner converts one of W, R, G, and B data, composing the input WRGB data, into 0 to generate conversion WRGB data having bits less than the total number of bits composing the W, R, G, and B data. The EPI transmitter generates WRGB data by adding dummy bits to the conversion WRGB data, and outputs the WRGB data to a source driver IC.
Abstract:
Disclosed are a timing controller and an LCD device including the same. The timing controller sequentially drives a plurality of sub-pixels, which are arranged in parallel on the same horizontal line, during a plurality of horizontal period. The timing controller includes a timing signal generation unit generating a first data enable signal on the basis of an active period of a data enable input signal supplied from the reception unit, generating a second data enable signal on the basis of an abnormal period generated during the active period, and generating a data enable output signal on the basis of the first and second data enable signals, and a data processing unit selecting display data corresponding to sequential driving of the horizontal periods among from the temporarily stored data according to the data enable output signal, and outputting the selected display data.