Abstract:
Disclosed is a display device that includes a substrate having an active area and a dead area around the active area; an alignment mark on the inside surface of the substrate in a part of the dead area; and a light-shielding pattern on a rear surface of the substrate in the dead area, the light-shielding pattern including a mark hole for exposing the alignment mark. By providing the light-shielding pattern on a display surface in the dead area, the display device has expanded active display area and improved visual appreciation.
Abstract:
Discussed is a touch display device having an antenna disposed in a panel, thereby improving product reliability while reducing manufacturing cost. The touch display device includes a display unit including a plurality of pixels disposed in an active area, an encapsulation unit disposed on the display unit, the encapsulation unit being configured to seal the plurality of pixels, a touch sensor unit including a plurality of touch sensors disposed on the encapsulation unit, an antenna pattern disposed at an edge on the touch sensor unit in the state in which a planarization layer is interposed therebetween, the antenna pattern not overlapping a touch electrode and a touch routing line included in the touch sensor unit, and a ground plane disposed in an identical layer to any one metal layer belonging to the display unit, the ground plane overlapping the antenna pattern.
Abstract:
A display apparatus includes a substrate including a penetrating area including a substrate hole, and a separating area surrounding the penetrating area, a first buffer layer including a first-buffer lower layer on the substrate, and a first-buffer upper layer on the first-buffer lower layer, a first TFT including a first semiconductor pattern on the first-buffer upper layer, and a first gate electrode overlapping with the first semiconductor pattern under conditions that a first gate insulating film is interposed therebetween, and first source/drain electrodes connected to the first semiconductor pattern, a second TFT, a separation structure disposed in the separating area of the substrate while including a first separation layer having the same stacked structure as the first-buffer upper layer, a second separation layer having the same stacked structure as the first gate insulating film, and a third separation layer having the same stacked structure as the first gate electrode.