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1.发明申请System to Improve Error Correction Using Variable Latency and Associated Methods 有权使用变量延迟和相关方法改进误差校正的系统公开(公告)号：US20100293438A1
公开(公告)日：2010-11-18
申请号：US12023546
申请日：2008-01-31
申请人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
发明人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
CPC分类号： G06F11/1048
摘要： A system to improve error correction may include a fast decoder to process data packets until the fast decoder finds an uncorrectable error in a data packet at which point a request for at least two data packets is generated. The system may also include a slow decoder to possibly correct the uncorrectable error in a data packet based upon the at least two data packets.
摘要翻译： 用于改进纠错的系统可以包括处理数据分组的快速解码器，直到快速解码器在数据分组中发现对于至少两个数据分组的请求产生的不可校正的错误。 该系统还可以包括慢解码器，以可能地基于至少两个数据分组校正数据分组中的不可校正错误。
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2.发明授权System to improve error correction using variable latency and associated methods 有权使用可变延迟和相关方法改进纠错的系统公开(公告)号：US08181094B2
公开(公告)日：2012-05-15
申请号：US12023546
申请日：2008-01-31
申请人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
发明人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
IPC分类号： H03M13/00
CPC分类号： G06F11/1048
摘要： A system to improve error correction includes a fast decoder to process data packets until the fast decoder finds an uncorrectable error in a data packet at which point a request for at least two data packets is generated. The system also includes a slow decoder to correct the uncorrectable error in a data packet based upon the at least two data packets.
摘要翻译： 改进纠错的系统包括处理数据分组的快速解码器，直到快速解码器在数据分组中发现不可校正的错误，在该时间点产生对至少两个数据分组的请求。 该系统还包括缓慢解码器，用于基于至少两个数据分组校正数据分组中的不可校正错误。
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公开(公告)号：US09128868B2
公开(公告)日：2015-09-08
申请号：US12023356
申请日：2008-01-31
申请人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd
发明人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd
CPC分类号： G06F11/1044 , G06F11/08 , G06F11/14 , H04W4/00 , H04W28/04
摘要： A system to improve error code decoding with retries may include a processing unit that requests data packets, and a queue to hold the data packets for the processing unit. The system may also include a decoder to determine a processing time for each data packet in the queue based upon any errors in each data packet, and if the processing time for a particular data packet is greater than a threshold, then to renew any requests for the data packets that are in the queue.
摘要翻译： 通过重试来改进错误代码解码的系统可以包括请求数据分组的处理单元和用于保存用于处理单元的数据分组的队列。 系统还可以包括解码器，用于基于每个数据分组中的任何错误来确定队列中每个数据分组的处理时间，并且如果特定数据分组的处理时间大于阈值，则更新对于 队列中的数据包。
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公开(公告)号：US20100293437A1
公开(公告)日：2010-11-18
申请号：US12023498
申请日：2008-01-31
申请人： Marc A. Gollub , Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Shmuel Winograd , Kenneth L. Wright
发明人： Marc A. Gollub , Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Shmuel Winograd , Kenneth L. Wright
CPC分类号： H03M13/1545 , G06F11/1048 , H03M13/1515 , H03M13/154 , H03M13/353 , H03M13/3707 , H03M13/6511
摘要： A system to improve memory failure management may include memory, and an error control decoder to determine failures in the memory. The system may also include an agent that may monitor failures in the memory. The system may further include a table where the error control decoder may record the failures, and where the agent can read and write to.
摘要翻译： 改善存储器故障管理的系统可以包括存储器和用于确定存储器中的故障的错误控制解码器。 系统还可以包括可以监视存储器中的故障的代理。 该系统还可以包括一个表，其中错误控制解码器可以记录故障，以及代理可以在哪里读写。
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公开(公告)号：US08352806B2
公开(公告)日：2013-01-08
申请号：US12023498
申请日：2008-01-31
申请人： Marc A. Gollub , Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Shmuel Winograd , Kenneth L. Wright
发明人： Marc A. Gollub , Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Shmuel Winograd , Kenneth L. Wright
IPC分类号： G06F11/00
CPC分类号： H03M13/1545 , G06F11/1048 , H03M13/1515 , H03M13/154 , H03M13/353 , H03M13/3707 , H03M13/6511
摘要： A system to improve memory failure management may include memory, and an error control decoder to determine failures in the memory. The system may also include an agent that may monitor failures in the memory. The system may further include a table where the error control decoder may record the failures, and where the agent can read and write to.
摘要翻译： 改善存储器故障管理的系统可以包括存储器和用于确定存储器中的故障的错误控制解码器。 系统还可以包括可以监视存储器中的故障的代理。 该系统还可以包括一个表，其中错误控制解码器可以记录故障，以及代理可以在哪里读写。
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6.发明申请System to Improve Miscorrection Rates in Error Control Code Through Buffering and Associated Methods 失效系统通过缓冲和相关方法提高错误控制代码的误码率公开(公告)号：US20100299576A1
公开(公告)日：2010-11-25
申请号：US12023516
申请日：2008-01-31
申请人： Irving G. Baysah , Timothy J. Dell , Luis A. Lastras-Montano , Warren E. Maule , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
发明人： Irving G. Baysah , Timothy J. Dell , Luis A. Lastras-Montano , Warren E. Maule , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
CPC分类号： G06F11/1044
摘要： A system to improve miscorrection rates in error control code may include an error control decoder with a safe decoding mode that processes at least two data packets. The system may also include a buffer to receive the processed at least two data packets from the error control decoder. The error control decoder may apply a logic OR operation to the uncorrectable error signal related to the processing of the at least two data packets to produce a global uncorrectable error signal. The system may further include a recipient to receive the at least two data packets and the global uncorrectable error signal.
摘要翻译： 用于改善错误控制代码中的错误率的系统可以包括处理至少两个数据分组的具有安全解码模式的错误控制解码器。 系统还可以包括缓冲器，以从误差控制解码器接收经处理的至少两个数据分组。 误差控制解码器可以对与至少两个数据分组的处理相关的不可校正误差信号应用逻辑或运算，以产生全局不可校正的误差信号。 系统还可以包括接收器以接收至少两个数据分组和全局不可校正的误差信号。
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7.发明授权System to improve miscorrection rates in error control code through buffering and associated methods 失效系统通过缓冲和相关方法提高错误控制代码中的错误率公开(公告)号：US08176391B2
公开(公告)日：2012-05-08
申请号：US12023516
申请日：2008-01-31
申请人： Irving G. Baysah , Timothy J. Dell , Luis A. Lastras-Montano , Warren E. Maule , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
发明人： Irving G. Baysah , Timothy J. Dell , Luis A. Lastras-Montano , Warren E. Maule , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winograd , Kenneth L. Wright
IPC分类号： H03M13/00
CPC分类号： G06F11/1044
摘要： A system to improve miscorrection rates in error control code may include an error control decoder with a safe decoding mode that processes at least two data packets. The system may also include a buffer to receive the processed at least two data packets from the error control decoder. The error control decoder may apply a logic OR operation to the uncorrectable error signal related to the processing of the at least two data packets to produce a global uncorrectable error signal. The system may further include a recipient to receive the at least two data packets and the global uncorrectable error signal.
摘要翻译： 用于改善错误控制代码中的错误率的系统可以包括处理至少两个数据分组的具有安全解码模式的错误控制解码器。 系统还可以包括缓冲器，以从误差控制解码器接收经处理的至少两个数据分组。 误差控制解码器可以对与至少两个数据分组的处理相关的不可校正误差信号应用逻辑或运算，以产生全局不可校正的误差信号。 系统还可以包括接收器以接收至少两个数据分组和全局不可校正的误差信号。
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公开(公告)号：US20100287436A1
公开(公告)日：2010-11-11
申请号：US12023356
申请日：2008-01-31
申请人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winogard
发明人： Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Michael R. Trombley , Shmuel Winogard
CPC分类号： G06F11/1044 , G06F11/08 , G06F11/14 , H04W4/00 , H04W28/04
摘要： A system to improve error code decoding with retries may include a processing unit that requests data packets, and a queue to hold the data packets for the processing unit. The system may also include a decoder to determine a processing time for each data packet in the queue based upon any errors in each data packet, and if the processing time for a particular data packet is greater than a threshold, then to renew any requests for the data packets that are in the queue.
摘要翻译： 通过重试来改进错误代码解码的系统可以包括请求数据分组的处理单元和用于保存用于处理单元的数据分组的队列。 系统还可以包括解码器，用于基于每个数据分组中的任何错误来确定队列中每个数据分组的处理时间，并且如果特定数据分组的处理时间大于阈值，则更新对于 队列中的数据包。
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9.发明申请METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR DYNAMIC SELECTIVE MEMORY MIRRORING 有权用于动态选择记忆镜的方法，系统和计算机程序产品公开(公告)号：US20090216985A1
公开(公告)日：2009-08-27
申请号：US12035695
申请日：2008-02-22
申请人： James A. O'Connor , Kanwal Bahri , Daniel J. Henderson , Luis A. Lastras-Montano , Warren E. Maule , Michael Mueller , Naresh Nayar , Richard Nicholas , Eric E. Retter , William J. Starke , Michael R. Trombley , Kenneth L. Wright
发明人： James A. O'Connor , Kanwal Bahri , Daniel J. Henderson , Luis A. Lastras-Montano , Warren E. Maule , Michael Mueller , Naresh Nayar , Richard Nicholas , Eric E. Retter , William J. Starke , Michael R. Trombley , Kenneth L. Wright
IPC分类号： G06F12/02
CPC分类号： G06F11/1666 , G06F11/1076 , G06F11/20 , G06F12/0246 , G06F2211/1088
摘要： Methods, systems, and computer program products are provided for dynamic selective memory mirroring in solid state devices. An amount of memory is reserved. Sections of the memory to select for mirroring in the reserved memory are dynamically determined. The selected sections of the memory contain critical areas. The selected sections of the memory are mirrored in the reserved memory.
摘要翻译： 为固态设备中的动态选择性存储器镜像提供了方法，系统和计算机程序产品。 保留一定量的内存。 用于在保留的存储器中选择镜像的存储器的部分是动态确定的。 存储器的选定部分包含关键区域。 存储器的选定部分被镜像在保留的存储器中。
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10.发明授权Methods, systems, and computer program products for dynamic selective memory mirroring 有权用于动态选择性存储器镜像的方法，系统和计算机程序产品公开(公告)号：US08099570B2
公开(公告)日：2012-01-17
申请号：US12035695
申请日：2008-02-22
申请人： James A. O'Connor , Kanwal Bahri , Daniel J. Henderson , Luis A. Lastras-Montano , Warren E. Maule , Michael Mueller , Naresh Nayar , Richard Nicholas , Eric E. Retter , William J. Starke , Michael R. Trombley , Kenneth L. Wright
发明人： James A. O'Connor , Kanwal Bahri , Daniel J. Henderson , Luis A. Lastras-Montano , Warren E. Maule , Michael Mueller , Naresh Nayar , Richard Nicholas , Eric E. Retter , William J. Starke , Michael R. Trombley , Kenneth L. Wright
CPC分类号： G06F11/1666 , G06F11/1076 , G06F11/20 , G06F12/0246 , G06F2211/1088
摘要： Methods, systems, and computer program products are provided for dynamic selective memory mirroring in solid state devices. An amount of memory is reserved. Sections of the memory to select for mirroring in the reserved memory are dynamically determined. The selected sections of the memory contain critical areas. The selected sections of the memory are mirrored in the reserved memory.
摘要翻译： 为固态设备中的动态选择性存储器镜像提供了方法，系统和计算机程序产品。 保留一定量的内存。 用于在保留的存储器中选择镜像的存储器的部分是动态确定的。 存储器的选定部分包含关键区域。 存储器的选定部分被镜像在保留的存储器中。
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