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公开(公告)号:US10459836B2
公开(公告)日:2019-10-29
申请号:US15629845
申请日:2017-06-22
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Chia-He Liu , Jian-Shing Liu
Abstract: A memory device and associated control method are provided. The memory device includes a memory array and a control circuit, which are electrically connected with each other. The memory array includes a plurality of memory groups. A first memory group among the plurality of memory groups includes at least one first memory unit. The control circuit executes the control method including following steps. Firstly, a first timestamp corresponding to a first time point is recorded when one of the at least one first memory unit is programmed. Then, state of the first memory group is identified based on the first timestamp and an identification rule, and the first memory group is retired when a condition being predefined in the identification rule is satisfied.
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公开(公告)号:US20180373625A1
公开(公告)日:2018-12-27
申请号:US15629845
申请日:2017-06-22
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Chia-He Liu , Jian-Shing Liu
CPC classification number: G06F12/0246 , G06F11/00 , G06F13/1668 , G06F2212/1036 , G06F2212/7209
Abstract: A memory device and associated control method are provided. The memory device includes a memory array and a control circuit, which are electrically connected with each other. The memory array includes a plurality of memory groups. A first memory group among the plurality of memory groups includes at least one first memory unit. The control circuit executes the control method including following steps. Firstly, a first timestamp corresponding to a first time point is recorded when one of the at least one first memory unit is programmed. Then, state of the first memory group is identified based on the first timestamp and an identification rule, and the first memory group is retired when a condition being predefined in the identification rule is satisfied.
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公开(公告)号:US09959044B2
公开(公告)日:2018-05-01
申请号:US15145504
申请日:2016-05-03
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Ting-Yu Liu , Nai-Ping Kuo , Yi-Chun Liu , Jian-Shing Liu
IPC: G06F12/00 , G06F13/00 , G06F13/28 , G06F3/06 , G06F12/1009
CPC classification number: G06F3/0605 , G06F3/0619 , G06F3/0631 , G06F3/065 , G06F3/0659 , G06F3/0679 , G06F3/068 , G06F12/0246 , G06F12/1009 , G06F12/1027 , G06F2212/1032 , G06F2212/152 , G06F2212/657
Abstract: A memory device includes a first storage unit storing an address mapping table, and a control unit coupled to the first storage unit and including a second storage unit storing a risky mapping table and a cached mapping table. The control unit is configured to: write data into the first storage unit; update mapping information associated with the data in the risky mapping table; and store mapping information in the cached mapping table into the address mapping table.
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